参数资料
型号: ADATE305BSVZ
厂商: Analog Devices Inc
文件页数: 29/56页
文件大小: 0K
描述: IC DCL ATE 250MHZ DUAL 100TQFP
标准包装: 1
类型: DCL
应用: 自动测试设备
安装类型: 表面贴装
封装/外壳: 100-TQFP 裸露焊盘
供应商设备封装: 100-TQFP-EP(14x14)
包装: 托盘
ADATE305
Rev. 0 | Page 35 of 56
DEFINITION OF SPI WORD
The SPI can accept variable length words, depending on the
operation. At most, the word length equals 24 bits: 16 bits of
data, two channel selects, one R/W selector, and a 5-bit address.
Depending on the operation, the data can be smaller or, in the
case of a read operation, nonexistent.
Table 18. Channel Selection
Channel 1
Channel 0
Channel Selected
0
NOP (no channel selected, no register
changes)
0
1
Channel 0 selected
1
0
Channel 1 selected
1
Channel 0 and Channel 1 selected
Table 19. R/W Definition
R/W
Description
0
Current register specified by address shifts out of
SDOUT on next shift operation
1
Current data is written to the register specified by
address and channel select
Example 1: 16-Bit Write
Write 16 bits of data to a register or DAC; ignore unused MSBs. For example, Bit 15 and Bit 14 are ignored, and Bit 13 through Bit 0 are
applied to the 14-bit DAC.
072
80-
00
4
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 68. 16-Bit Write
Example 2: 14-Bit Write
Write 14 bits of data to the DAC.
07
28
0-
00
5
DATA[13:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 69. 14-Bit Write
Example 3a: 2-Bit Write
Write two bits of data to the 2-bit register.
07
280-
006
DATA[1:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 70. 2-Bit Write
Example 3b: 2-Bit Write
Write two bits of data to the 2-bit register. Bit 15 through Bit 2 are ignored and Bit 1 through Bit 0 are applied to the register.
0728
0-
007
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 71. 2-Bit Write
Example 4: Read Request
Read request and follow with a second instruction (could be NOP) to clock out the data.
07
28
0-
0
08
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
CH[1:0]
R/W = 0
ADDR[4:0]
Figure 72. Read Request
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