参数资料
型号: ADAU1361BCPZ-RL
厂商: Analog Devices Inc
文件页数: 23/80页
文件大小: 0K
描述: IC CODEC 24B PLL 32LFCSP
标准包装: 5,000
类型: 音频编解码器
数据接口: 串行
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
电压 - 电源,模拟: 1.8 V ~ 3.6 V
电压 - 电源,数字: 1.8 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ
包装: 带卷 (TR)
ADAU1361
Rev. C | Page 3 of 80
REVISION HISTORY
9/10—Rev. B to Rev. C
Changes to Figure 1...........................................................................1
5/10—Rev. A to Rev. B
Changes to Burst Mode Writing and Reading Section ..............38
Changes to Table 26 ........................................................................45
Change to Table 43..........................................................................58
Added R67: Dejitter Control, 16,438 (0x4036) Section .............73
12/09—Rev. 0 to Rev. A
Changes to Features Section ............................................................1
Changes to General Description Section .......................................1
Changes to Table 1 ............................................................................6
Change to Table 5 ............................................................................10
Changes to Figure 6.........................................................................13
Changes to Table 10 ........................................................................15
Changes to Captions of Figure 15, Figure 16, Figure 18,
and Figure 19 ...................................................................................18
Changes to Captions of Figure 21 and Figure 24 ........................19
Added Figure 22; Renumbered Sequentially ...............................19
Change to Figure 25 ........................................................................20
Change to Figure 26 ........................................................................21
Change to Figure 27 ........................................................................22
Change to Theory of Operation Section ......................................23
Changes to Power Reduction Modes Section and
Case 1: PLL Is Bypassed Section ...................................................24
Changes to PLL Lock Acquisition Section...................................25
Changes to Core Clock Section.....................................................26
Changes to Input Signal Paths Section and Figure 31................29
Changes to Figure 32 and Figure 33 .............................................30
Changes to ADC Full-Scale Level Section ...................................31
Change to Automatic Level Control (ALC) Section...................32
Changes to Output Signal Paths Section......................................35
Changes to Headphone Output Section.......................................36
Changes to Jack Detection Section, Pop-and-Click
Suppression Section, and Line Outputs Section .........................37
Changes to Control Ports Section and I2C Port Section............38
Added Burst Mode Writing and Reading Section ......................38
Changes to SPI Port Section ..........................................................41
Changes to Serial Data Input/Output Ports Section, Table 24,
and Table 25 .....................................................................................42
Added Figure 56 ..............................................................................42
Changes to Figure 60 and Figure 61 .............................................43
Changes to Table 26 ........................................................................45
Changes to R2: Digital Microphone/Jack Detection Control,
16,392 (0x4008) Section and Table 29..........................................47
Changes to Table 35 ........................................................................52
Changes to Table 36 ........................................................................53
Changes to R15: Serial Port Control 0, 16,405 (0x4015)
Section and Table 42 .......................................................................57
Change to Table 43..........................................................................58
Changes to Table 44, R18: Converter Control 1, 16,408
(0x4018) Section, and Table 45 .....................................................59
Changes to Table 53, R27: Playback L/R Mixer Right (Mixer 6)
Line Output Control, 16,417 (0x4021) Section, and Table 54...65
Changes to Table 55, R29: Playback Headphone Left Volume
Control, 16,419 (0x4023) Section, and Table 56 .........................66
Changes to R42: Jack Detect Pin Control, 16,433 (0x4031)
Section and Table 69 .......................................................................73
1/09—Revision 0: Initial Version
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