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参数资料
| 型号： | ADC0800 |
| 厂商： | National Semiconductor Corporation |
| 英文描述： | ECONOLINE: REC3-S_DRW(Z)/H* - 3W DIP Package- 1kVDC Isolation- Wide Input 2:1 & 4:1- Regulated Output- 100% Burned In- UL94V-0 Package Material- Continuous Short Circiut Protection- Efficiency to 80% |
| 中文描述： | ADC0800 8位A / D转换器 |
| 文件页数： | 8/10页 |
| 文件大小： | 166K |
| 代理商： | ADC0800 |
Typical Applications
(Continued)
The digital output LED display can be decoded by dividing
the 8 bits into the 4 most significant bits and 4 least signifi-
cant bits. Table I shows the fractional binary equivalent of
these two 8-bit groups. By adding the decoded voltages
which are obtained from the column: ‘‘Input Voltage Value
with a 10.240 V
REF
’’ of both the MS and LS groups, the
value of the digital display can be determined. For example,
for an output LED display of ‘‘1011 0110’’ or ‘‘B6’’ (in hex)
the voltage values from the table are 7.04
a
0.24 or
7.280 V
DC
. These voltage values represent the center val-
ues of a perfect A/D converter. The input voltage has to
change by
g
(/2
LSB (
g
20 mV), the ‘‘quantization uncertain-
ty’’ of an A/D, to obtain an output digital code change. The
effects of this quantization error have to be accounted for in
the interpretation of the test results. A plot of this natural
error source is shown inFigure 5 where, for clarity, both the
analog input voltage and the error voltage are normalized to
LSBs.
TABLE I. DECODING THE DIGITAL OUTPUT LEDs
INPUT VOLTAGE
VALUE WITH
10.24 V
REF
FRACTIONAL BINARY VALUE FOR
HEX
BINARY
MS GROUP
LS GROUP
MS GROUP
LS GROUP
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
15/16
15/256
9.600
8.960
8.320
7.680
7.040
6.400
5.760
5.120
4.480
3.840
3.200
2.560
1.920
1.280
0.640
0
0.600
0.560
0.520
0.480
0.440
0.400
0.360
0.320
0.280
0.240
0.200
0.160
0.120
0.080
0.040
0
7/8
7/128
13/16
13/256
3/4
3/64
11/16
11/256
5/8
5/128
9/16
9/256
1/2
1/32
7/16
7/256
3/8
3/128
5/16
5/256
1/4
1/64
3/16
3/256
1/8
1/128
1/16
1/256
TL/H/5670–8
FIGURE 5. Error Plot of a Perfect A/D Showing Effects of Quantization Error
8
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