参数资料
型号: ADC08351
厂商: National Semiconductor Corporation
英文描述: 8-Bit, 42 MSPS, 40 mW A/D Converter
中文描述: 8位,42 MSPS的40毫瓦的A / D转换器
文件页数: 8/15页
文件大小: 492K
代理商: ADC08351
Specification Definitions
(Continued)
FULL SCALE OFFSET ERROR
is the difference between
the analog input voltage that just causes the output code to
transition to the full scale code (all 1’s in the case of the
ADC08351) and the ideal value of 1
1
2
LSB below the value
of V
REF
.
INTEGRAL NON-LINEARITY (INL)
is a measure of the de-
viation of each individual code from a line drawn from zero
scale (
1
2
LSB below the first code transition) through positive
full scale (
1
2
LSB above the last code transition). The devia-
tion of any given code from this straight line is measured
from the center of that code value. The end point test method
is used.
OUTPUT DELAY
is the time delay after the rising edge of
the input clock before the data update is present at the out-
put pins.
OUTPUT HOLD TIME
is the length of time that the output
data is valid after the rise of the input clock.
PIPELINE DELAY (LATENCY)
is the number of clock cycles
between initiation of conversion and the availability of that
conversion result at the output. New data is available at ev-
ery clock cycle, but the data lags the conversion by the pipe-
line delay.
SAMPLING (APERTURE) DELAY
is that time required after
the fall of the clock input for the sampling switch to open. The
sample is effectively taken this amount of time after the fall of
the clock input.
Timing Diagram
SIGNAL TO NOISE RATIO (SNR)
is the ratio of the rms
value of the input signal to the rms value of the other spectral
components below one-half the sampling frequency, not in-
cluding harmonics or dc.
SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or
SINAD)
is the ratio of the rms value of the input signal to the
rms value of all of the other spectral components below half
the clock frequency, including harmonics but excluding dc.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not
present at the input.
TOTAL HARMONIC DISTORTION (THD)
is the ratio of the
rms total of the first six harmonic components to the rms
value of the input signal.
ZERO SCALE OFFSET ERROR
is the difference between
the analog input voltage that just causes the output code to
transition to the first code and the ideal value of
1
2
LSB for
that transition.
DS100895-23
FIGURE 1. ADC08351 Timing Diagram
A
www.national.com
8
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