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| 型号： | ADC0851BIN |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | 8-Bit Analog Data Acquisition and Monitoring Systems |
| 中文描述： | 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16 |
| 封装： | PLASTIC, DIP-16 |
| 文件页数： | 30/36页 |
| 文件大小： | 581K |
| 代理商： | ADC0851BIN |
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3.0 The Analog Inputs
(Continued)
resistance. Another source of error is the sampling nature of
the A/D converter. Short spikes of current enter the ‘‘
a
’’
input and exit the ‘‘
b
’’ input at the rising and falling tran-
sition of the OSC clock . These currents decay rapidly and
generally do not cause errors since the internal comparator
is strobed at the end of a clock period. If large source resist-
ances are used however, then the transients caused by the
current spikes may not settle completely before conversion
begins. If a capacitor is used at the input of the A/D convert-
er for input filtering then the input signal source resistance
should be kept at 1 k
X
or less.
3.3 ANALOG INPUT PROTECTION
Often the analog inputs of A/D converters are driven from
voltage sources that can swing higher than V
CC
or lower
than GND. Analog inputs often come from op amps which
use
g
15V supplies. While during normal operation the input
voltages stay within the 0V–5V A/D converter supply volt-
age range, at power up the input voltage may actually rise
above or fall below the A/D converter’s supply voltages. If
the input voltage to any A/D converter input pin does fall
outside the supply voltage by more than 0.3V (worst case)
and the input draws more than 5 mA then there is a good
possibility that the converter may latch up and provide a low
impedance short between V
CC
and GND.
Figure 13 shows the overvoltage protection circuit for the
analog input. If, for instance, the amplifier’s output saturates
to its positive supply rail, then the junction of R1 and R2
would be clamped to V
CC
plus a diode drop. Resistor R1
limits the op amp’s output current and R2 limits the current
flowing into the input of the A/D converter. Likewise, the
junction of R1 and R2 would be clamped to a diode drop
below ground if the op amp’s output saturates to the nega-
tive rail.
4.0 Zero Scale and Full Scale
Adjustment
4.1 ZERO SCALE ERROR
The zero scale error of the A/D converter does not require
adjustment. If the minimum analog input voltage value,
V
IN(Min)
, is not at ground potential then a zero offset can be
done. The converter can be made to output 0000 0000 digi-
tal code for this minimum input voltage by biasing the V
IN(
b
)
input of a differential input pair at this V
IN(Min)
value. This
utilizes the differential mode operation of the A/D converter.
The zero scale error of the A/D converter relates to the
location of the first riser of the transfer function and can be
measured by grounding the V
IN(
b
)
input and applying a
small magnitude positive voltage to the V
IN(
a
)
input. Zero
error is the difference between the actual DC input voltage
(the ideal
(/2
LSB value,
(/2
LSB
e
9.8 mV for V
REF
e
5.000
V
DC
) and the applied input voltage that causes an output
digital code transition from 0000 0000 to 0000 0001.
4.2 FULL SCALE ADJUSTMENT
The full-scale adjustment can be made by applying an input
voltage that is 1.5 LSB less than the desired analog full-
scale voltage and then adjusting the magnitude of the V
REF
input voltage for a digital output code that just changes from
1111 1110 to 1111 1111.
4.3 ADJUSTING FOR AN ARBITRARY
ANALOG INPUT VOLTAGE RANGE
Analog input voltages that span from a positive non-zero
minimum value can easily be accommodated by the
ADC0851/8. In this case, the A/D converter is used in the
differential mode and a reference voltage equal to V
IN(Min)
is applied to the V
IN(
b
)
input. Normally zero scale adjust-
ment is not required because the zero scale error is very
small. However, if zero scale adjustment is desired then a
voltage equal to V
IN(Min)
plus
(/2
LSB (where 1 LSB
e
Input
voltage span/256) should be applied to V
IN(
a
)
and the ref-
erence voltage at V
IN(
b
)
should be adjusted such that the
output code just changes from 0000 0000 to 0000 0001.
Once the proper reference voltage is applied to the V
IN(
b
)
input then full scale adjustment can be made. Full scale
adjustment is made by first applying a voltage to the V
IN(
a
)
input that is 1.5 LSB less than V
IN(Max)
i.e.;
V
IN(
a
) FS ADJ
e
V
Max
b
1.5
[
(V
Max
b
V
Min
)/256
]
where, V
Max
e
the high end of the analog input voltage
range
V
Min
e
the low end of the analog input voltage
range
The reference voltage, V
REF
applied to the reference input
pin of the A/D converter is adjusted so that the output code
just changes from 1111 1110 to 1111 1111. This completes
the adjustment procedure.
Typical Applications
TL/H/11021–55
FIGURE 12. Recommended Connection for ADC0851 and ADC0858
30
相关PDF资料 |
PDF描述 |
|---|---|
| ADC0851BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0858CIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0858CIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADC0851BIV | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Single-Ended Data Acquisition System |
| ADC0851CIN | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIV | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CMJ/883 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Single-Ended Data Acquisition System |
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