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| 型号： | ADC0858CIN |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | 8-Bit Analog Data Acquisition and Monitoring Systems |
| 中文描述： | 8-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20 |
| 封装： | PLASTIC, DIP-20 |
| 文件页数： | 29/36页 |
| 文件大小： | 581K |
| 代理商： | ADC0858CIN |
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4.0 A/D Conversion Modes
(Continued)
The first eight bits of the output word represents the digital
equivalent of the analog input voltage. Status bits I3 through
I0 provide the channel configuration information as per Ta-
ble V(a) and (b) for ADC0851 and ADC0858 respectively.
Keeping CS low after I0 is transmitted causes the output to
be TRI-STATE. Once the output data is transmitted, CS may
go high to initiate the start of the next A/D conversion. The
subsequent A/D conversion starts on the next channel pair
that is configured as per the initially loaded input word (Fig-
ure 11). Any data on the data input (DI) line is ignored. Note
that if the duration for which CS is high is less than seven-
teen OSC clock periods then the conversion process would
be interrupted and the device would look for the mode ad-
dress at the falling edge of CS so that a new mode of opera-
tion can be configured.
To ensure proper operation in the ‘‘Auto A/D Conversion’’
mode, CS going low should be synchronized with EOC go-
ing high. Thus after EOC goes high, the conversion is com-
pleted and CS can go low to transmit the output data. After
the output data is transmitted, CS should go high to initiate
automatic A/D conversion on the next channel pair and re-
main high until the conversion is completed and EOC goes
high. Meanwhile, if CS goes low while EOC is low then the
conversion process is interrupted and the device is readied
for a new mode of operation.
5.0 Test Mode
A mode address of 1 1 0 0 configures the device in the test
mode. This mode is used to test the internal operation of the
device at the factory and is not recommended for normal
use. If the device is accidentally configured in the test mode
then the power supply must be disconnected and recon-
nected again to reset the device.
6.0 Bidirectional I/O
If the microprocessor has bidirectional Input/Output capa-
bility then ADC0851/8’s input and output pins can be tied
together and a single wire can be used to serially input data
to or output data from ADC0851/8. This capability is made
possible because when the input word is clocked in, the
output pin is in TRI-STATE and when the output word is
clocked out, the data at the input pin is ignored.
II. Analog Considerations
1.0 A/D Conversion Time
The A/D conversion time is a function of the OSC clock
frequency. The oscillator frequency is set by connecting an
external resistor, R
ext
from the ADC0851/8’s OSC pin to
V
CC
and an external capacitor, C
ext
from the OSC pin to
ground. With R
ext
e
3.16 k
X
and C
ext
e
170 pF, the OSC
frequency is 1 MHz at V
CC
e
4.5V and 1.05 MHz at V
CC
e
5.5V.
The OSC frequency will vary as the ambient temperature
varies, this is shown by the Typical Performance Character-
istics curve, ‘‘OSC Frequency vs Temperature’’. For a speci-
fied external resistor, the OSC frequency can be changed
by varying the external capacitor as is shown by the Typical
Performance Characteristics curve, ‘‘OSC Frequency vs
R
ext
and C
ext
’’. Note that the OSC pin of the ADC0851/8
should not be driven by an external clock as this might
cause improper operation. The A/D converter’s conversion
time is a minimum of seventeen OSC clock periods and a
maximum of eighteen.Figure 12 shows a typical connection
for the ADC0851 and ADC0858.
2.0 The Reference
The magnitude of the reference voltage (V
REF
) applied to
the A/D converter determines the analog input voltage span
(i.e., the difference between V
IN(max)
and V
IN(Min)
) over
which the 256 possible output codes apply. The reference
voltage source connected to the V
REF
pin of ADC0851/8
must be capable of driving a minimum load of 4 k
X
.
The ADC0851/8 can be used in either ratiometric applica-
tions or in systems requiring absolute accuracy. In a ratio-
metric system, the analog input voltage is proportional to
the voltage used for the A/D’s reference. This voltage is
usually the system power supply, so the V
REF
pin can be
tied to V
CC
.
For absolute accuracy, where the analog input varies be-
tween very specific voltage limits, the reference pin must be
connected to a voltage source that is stable over time and
temperature. The LM385 and LM336 micropower refer-
ences are good low current devices for use with these A/D
converters.
The maximum value of the reference voltage is limited by
the A/D converter’s power supply voltage, V
CC
. The mini-
mum value, however, can be as low as 1V while maintaining
a typical Integral Linearity of
g
1 LSB (see Typical Perform-
ance Characteristics curve, ‘‘Linearity Error vs Reference
voltage’’). This allows direct conversion of transducer out-
puts that provide less than a 5V output span. Due to the
increased sensitivity of the A/D converter at low reference
voltages (e.g., 1 LSB
e
3.9 mV for a 1V full scale range),
care must be exercised with regard to noise pickup, circuit
layout, and system error voltage sources.
3.0 The Analog Inputs
3.1 REDUCING COMMON MODE ERROR
Rejection of common mode noise can be achieved by con-
figuring the ADC0851/8’s inputs in the differential mode
since the offending common mode signal is common to
both the selected ‘‘
a
’’ and ‘‘
b
’’ inputs. The time interval
between sampling the ‘‘
a
’’ input and the ‘‘
b
’’ input is one
oscillator clock period. A change in the common-mode volt-
age during this short time interval can cause conversion er-
rors. For a sinusoidal common-mode signal this error is:
V
error(Max)
e
V
PEAK
(2
q
f
CM
) (1/f
OSC
)
where f
CM
is the frequency of the common-mode signal,
V
PEAK
is the signal’s peak voltage and f
OSC
is the A/D
converter’s OSC clock frequency.
For a 60 Hz common-mode signal to generate a
(/4
LSB
error (
&
5 mV for a 5V full scale range) with the converter
running at f
OSC
e
250 kHz, its peak voltage would have to
be 3.3V.
3.2 SOURCE RESISTANCE
For a source resistance under 2 k
X
, the ADC0851/8’s total
unadjusted error is typically
g
0.2 LSB at V
REF
e
4.75V and
f
OSC
s
1 MHz (see Typical Performance Characteristics
curves, ‘‘Total Unadjusted Error vs Source Impedance’’).
One source of error is the multiplexer’s leakage current of
3
m
A which contributes a 3 mV drop across a 1 k
X
source
29
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