参数资料
型号: ADCMP552BRQZ
厂商: Analog Devices Inc
文件页数: 14/16页
文件大小: 0K
描述: IC COMPARATOR PECL/LVPECL 20QSOP
标准包装: 56
类型: 带锁销
元件数: 1
输出类型: 补充型,差分,LVPECL,开路发射极,PECL
电压 - 电源,单路/双路(±): 3.14 V ~ 5.25 V
电压 - 输入偏移(最小值): 10mV @ 3.3V
电流 - 输入偏压(最小值): 28µA @ 3.3V
电流 - 输出(标准): 55mA @ 3.3V
电流 - 静态(最大值): 17mA
CMRR, PSRR(标准): 76dB CMRR,75dB PSRR
传输延迟(最大): 0.625ns
磁滞: ± 0.5mV
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
安装类型: 表面贴装
包装: 管件
产品目录页面: 764 (CN2011-ZH PDF)
配用: EVAL-ADCMP552BRQZ-ND - BOARD EVALUATION ADCMP552BRQZ
Data Sheet
ADCMP551/ADCMP552/ADCMP553
Rev. A | Page 7 of 16
Pin No.
Mnemonic
Function
ADCMP551
ADCMP552
ADCMP553
12
15
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
13
16
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
15
18
QB
One of Two Complementary Outputs for Channel B. QB is logic low if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
16
19
QB
One of Two Complementary Outputs for Channel B. QB is logic high if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
7
VCC
Positive Supply Terminal.
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