参数资料
型号: ADCMP552BRQZ
厂商: Analog Devices Inc
文件页数: 4/16页
文件大小: 0K
描述: IC COMPARATOR PECL/LVPECL 20QSOP
标准包装: 56
类型: 带锁销
元件数: 1
输出类型: 补充型,差分,LVPECL,开路发射极,PECL
电压 - 电源,单路/双路(±): 3.14 V ~ 5.25 V
电压 - 输入偏移(最小值): 10mV @ 3.3V
电流 - 输入偏压(最小值): 28µA @ 3.3V
电流 - 输出(标准): 55mA @ 3.3V
电流 - 静态(最大值): 17mA
CMRR, PSRR(标准): 76dB CMRR,75dB PSRR
传输延迟(最大): 0.625ns
磁滞: ± 0.5mV
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
安装类型: 表面贴装
包装: 管件
产品目录页面: 764 (CN2011-ZH PDF)
配用: EVAL-ADCMP552BRQZ-ND - BOARD EVALUATION ADCMP552BRQZ
ADCMP551/ADCMP552/ADCMP553
Data Sheet
Rev. A | Page 12 of 16
Figure 18. Propagation Delay Dispersion
COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often useful in a
noisy environment or where it is not desirable for the
comparator to toggle between states when the input signal is at
the switching threshold. The transfer function for a comparator
with hysteresis is shown in Figure 19. If the input voltage
approaches the threshold from the negative direction, the
comparator switches from a 0 to a 1 when the input crosses
+VH/2. The new switching threshold becomes VH/2. The
comparator remains in a 1 state until the VH/2 threshold is
crossed coming from the positive direction. In this manner,
noise centered on 0 V input does not cause the comparator to
switch states unless it exceeds the region bounded by ±VH/2.
Positive feedback from the output to the input is often used to
produce hysteresis in a comparator (Figure 23). The major
problem with this approach is that the amount of hysteresis
varies with the output logic levels, resulting in a hysteresis that
is not symmetrical around zero.
In the ADCMP552, hysteresis is generated through the
programmable hysteresis pin. A resistor from the HYS pin to
VCCI creates a current into the part that is used to generate
hysteresis. Hysteresis generated in this manner is independent
of output swing and is symmetrical around the trip point. The
hysteresis versus resistance curve is shown in Figure 20.
A current source can also be used with the HYS pin. The
relationship between the current applied to the HYS pin and the
resulting hysteresis is shown in Figure 16.
Figure 19. Comparator Hysteresis Transfer Function
Figure 20. Comparator Hysteresis Transfer Function
MINIMUM INPUT SLEW RATE REQUIREMENT
As for all high speed comparators, a minimum slew rate must
be met to ensure that the device does not oscillate when the
input crosses the threshold. This oscillation is due in part to the
high input bandwidth of the comparator and the parasitics of
the package. Analog Devices recommends a slew rate of 1 V/s
or faster to ensure a clean output transition. If slew rates less
than 1 V/s are used, hysteresis should be added to reduce the
oscillation.
Q OUTPUT
INPUT VOLTAGE
1.5V OVERDRIVE
20mV OVERDRIVE
DISPERSION
VREF ± VOS
04722-017
OUTPUT
INPUT
0
1
0V
–VH
2
+VH
2
04722-018
120
100
80
60
40
20
0
100
10
1
04722-019
RHYS (k)
PROGRAMMED
HYSTERESIS
(mV)
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