- 您现在的位置：买卖IC网 > PDF目录10737 > ADCMP563BRQZ (Analog Devices Inc)IC COMPARATOR ECL DUAL 16QSOP PDF资料下载
参数资料
| 型号： | ADCMP563BRQZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR ECL DUAL 16QSOP |
| 标准包装： | 98 |
| 类型： | 带锁销 |
| 元件数： | 2 |
| 输出类型： | 补充型，差分，ECL，开路发射极 |
| 电压 - 电源，单路/双路(±)： | ±4.75 V ~ 5.25 V |
| 电压 - 输入偏移（最小值）： | 2mV @ -5.2V，5V |
| 电流 - 输入偏压（最小值）： | 3µA @ -5.2V，5V |
| 电流 - 输出（标准）： | 30mA |
| 电流 - 静态（最大值）： | 5mA，25mA |
| CMRR, PSRR（标准）： | 80dB CMRR，85dB PSRR |
| 传输延迟（最大）： | 0.83ns |
| 磁滞： | ±1mV |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 安装类型： | 表面贴装 |
| 包装： | 管件 |
| 产品目录页面： | 764 (CN2011-ZH PDF) |
| 配用： | EVAL-ADCMP563BRQZ-ND - BOARD EVALUATION ADCMP563BRQZ |
ADCMP563/ADCMP564
Rev. C | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
04650-
0-
002
ADCMP563
BRQ
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
–INA
+INA
QA
GND
VEE
LEA
–INB
+INB
QB
GND
VCC
LEB
Figure 5. ADCMP563 16-Lead QSOP
Pin Configuration
04650-
0-
012
ADCMP564
BRQ
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
–INA
QA
GND
VEE
LEA
GND
+INA
HYSA
–INB
QB
GND
VCC
LEB
GND
+INB
HYSB
Figure 6. ADCMP564 20-Lead QSOP
Pin Configuration
04650-
0
-027
ADCMP563
BCP
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
–INA
VCC LEB LEB GND
VEE LEA LEA GND
+INA
+INB
QB
–INB
QA
QB
PIN1
NOTES:
1. THE EXPOSED PAD SHOULD BE EITHER
CONNECTED TO VEE OR LEFT FLOATING.
Figure 7. ADCMP563 16-Lead LFCSP
Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
ADCMP563
16-Lead
QSOP
ADCMP563
16-Lead
LFCSP
ADCMP564
20-Lead
QSOP
Mnemonic
Function
1
GND
Analog Ground.
1
11
2
QA
One of Two Complementary Outputs for Channel A. QA is logic high if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See
the description of the LEA pin for more information.
2
12
3
QA
One of Two Complementary Outputs for Channel A. QA is logic low if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See
the description of the LEA pin for more information.
3
13
4
GND
Analog Ground.
4
14
5
LEA
One of Two Complementary Inputs for Channel A Latch Enable. In compare
mode (logic high), the output tracks change at the input of the comparator.
In latch mode (logic low), the output reflects the input state just prior to the
comparator being placed in the latch mode. LEA must be driven in
conjunction with LEA. If left unconnected, the comparator defaults to
compare mode.
5
15
6
LEA
One of Two Complementary Inputs for Channel A Latch Enable. In compare
mode (logic low), the output tracks change at the input of the comparator.
In latch mode (logic high), the output reflects the input state just prior to the
comparator being placed in the latch mode. LEA must be driven in
conjunction with LEA. If left unconnected, the comparator defaults to
compare mode.
6
16
7
VEE
Negative Supply Terminal.
7
1
8
INA
Inverting Analog Input of the Differential Input Stage for Channel A. The
Inverting A input must be driven in conjunction with the Noninverting A input.
8
2
9
+INA
Noninverting Analog Input of the Differential Input Stage for Channel A. The
Noninverting A input must be driven in conjunction with the Inverting A input.
10
HYSA
Programmable Hysteresis Input.
11
HYSB
Programmable Hysteresis Input.
9
3
12
+INB
Noninverting Analog Input of the Differential Input Stage for Channel B. The
Noninverting B input must be driven in conjunction with the Inverting B input.
10
4
13
INB
Inverting Analog Input of the Differential Input Stage for Channel B. The
Inverting B input must be driven in conjunction with the Noninverting B input.
11
5
14
VCC
Positive Supply Terminal.
相关PDF资料 |
PDF描述 |
|---|---|
| VI-JNP-MY-F3 | CONVERTER MOD DC/DC 13.8V 50W |
| VI-BW0-MY-B1 | CONVERTER MOD DC/DC 5V 50W |
| VI-JNP-MY-F2 | CONVERTER MOD DC/DC 13.8V 50W |
| VI-B1H-MY-B1 | CONVERTER MOD DC/DC 52V 50W |
| VI-JNP-MY-F1 | CONVERTER MOD DC/DC 13.8V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADCMP564 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual High Speed ECL Comparators |
| ADCMP564BRQ | 功能描述:IC COMPARATOR ECL DUAL HS 20QSOP RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| ADCMP564BRQZ | 功能描述:IC COMPARATOR ECL DUAL HS 20QSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 标准包装:1 系列:- 类型:通用 元件数:1 输出类型:CMOS，开路集电极，TTL 电压 - 电源，单路/双路(±):2.7 V ~ 5.5 V 电压 - 输入偏移（最小值）:7mV @ 5V 电流 - 输入偏压（最小值）:0.25µA @ 5V 电流 - 输出（标准）:84mA @ 5V 电流 - 静态（最大值）:120µA CMRR, PSRR（标准）:- 传输延迟（最大）:600ns 磁滞:- 工作温度:-40°C ~ 85°C 封装/外壳:SC-74A，SOT-753 安装类型:表面贴装 包装:剪切带 (CT) 产品目录页面:1268 (CN2011-ZH PDF) 其它名称:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP565 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Ultrafast Voltage Comparator |
| ADCMP565BP | 功能描述:IC COMP DUAL ULTRA-FAST 20-PLCC RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
发布紧急采购，3分钟左右您将得到回复。