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| 型号： | ADCMP603BCPZ-WP |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/16页 |
| 文件大小： | 0K |
| 描述： | IC COMP TTL/CMOS 1CHAN 12-LFCSP |
| 标准包装： | 50 |
| 类型： | 带锁销 |
| 元件数： | 1 |
| 输出类型： | CMOS，补充型，满摆幅，TTL |
| 电压 - 电源，单路/双路(±)： | 2.5 V ~ 5.5 V |
| 电压 - 输入偏移（最小值）： | 5mV @ 2.5V |
| 电流 - 输入偏压（最小值）： | 5µA @ 2.5V |
| 电流 - 输出（标准）： | 50mA |
| 电流 - 静态（最大值）： | 1.8mA |
| CMRR, PSRR（标准）： | 50dB CMRR，50dB PSRR |
| 传输延迟（最大）： | 5ns |
| 磁滞： | 100µV |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 12-VFQFN 裸露焊盘，CSP |
| 安装类型： | 表面贴装 |
| 包装： | 托盘 - 晶粒 |
Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,
Single-Supply TTL/CMOS Comparator
ADCMP603
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VP NONINVERTING
INPUT
VN INVERTING
INPUT
SDN INPUT
Q OUTPUT
VCCI
VCCO
LE/HYS INPUT
05
91
5-
00
1
ADCMP603
TTL
Fully specified rail to rail at V = 2.5 V to 5.5 V
CC
Input common-mode voltage from 0.2 V to V + 0.2 V
CC
Low glitch CMOS-/TTL-compatible output stage
Complementary outputs
3.5 ns propagation delay
12 mW at 3.3 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection > 50 dB
40°C to +125°C operation
APPLICATIONS
Figure 1.
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
Pulse spectroscopy
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
Automatic test equipment (ATE)
GENERAL DESCRIPTION
The device passes 4.5 kV HBM ESD testing and the absolute
maximum ratings include current limits for all pins.
The ADCMP603 is a very fast comparator fabricated on
XFCB2, an Analog Devices, Inc. proprietary process. This
comparator is exceptionally versatile and easy to use. Features
include an input range from V
The complementary TTL-/CMOS-compatible output stage is
designed to drive up to 5 pF with full timing specs and to
degrade in a graceful and linear fashion as additional
capacitance is added. The comparator input stage offers robust
protection against large input overdrive, and the outputs do not
phase reverse when the valid input signal range is exceeded.
Latch and programmable hysteresis features are also provided
with a unique single-pin control option.
0.5 V to V
EE
CC
+ 0.2 V, low noise
complementary TTL-/CMOS-compatible output drivers, latch
inputs with adjustable hysteresis and a shutdown input.
The device offers 3.5 ns propagation delay with 10 mV
overdrive on 4 mA typical supply current.
A flexible power supply scheme allows the device to operate
with a single +2.5 V positive supply and a 0.5 V to +2.8 V
input signal range up to a +5.5 V positive supply with a 0.5 V
to +5.8 V input signal range. Split input/output supplies with no
sequencing restrictions support a wide input signal range while
still allowing independent output swing control and power
savings.
The ADCMP603 is available in a 12-lead LFCSP package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
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