- 您现在的位置：买卖IC网 > PDF目录20619 > ADE5169ASTZF62 (Analog Devices Inc)IC METER/8052/RTC/LCD DR 64LQFP PDF资料下载
参数资料
| 型号： | ADE5169ASTZF62 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 31/156页 |
| 文件大小： | 0K |
| 描述： | IC METER/8052/RTC/LCD DR 64LQFP |
| 标准包装： | 1 |
| 输入阻抗： | * |
| 测量误差： | * |
| 电压 - 高输入/输出： | * |
| 电压 - 低输入/输出： | * |
| 电流 - 电源： | * |
| 电源电压： | * |
| 测量仪表类型： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页当前第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页
Data Sheet
POWER SUPPLY ARCHITECTURE
The ADE5166/ADE5169/ADE5566/ADE5569 have two power
supply inputs, V DD and V BAT . They require only a single 3.3 V power
supply at V DD for full operation. A battery backup, or secondary
power supply, with a maximum of 3.7 V can be connected to the
V BAT input. Internally, the ADE5166/ADE5169/ADE5566/
ADE5569 connect V DD or V BAT to V SWOUT , which is used to derive
power for the ADE5166/ADE5169/ADE5566/ADE5569 circuitry.
The V SWOUT output pin reflects the voltage at the internal power
supply (V SWOUT ) and has a maximum output current of 6 mA. This
pin can also be used to power a limited number of peripheral com-
ponents. The 2.5 V analog supply (V INTA ) and the 2.5 V supply for
the core logic (V INTD ) are derived by on-chip linear regulators from
V SWOUT . Figure 32 shows the ADE5166/ADE5169/ADE5566/
ADE5569 power supply architecture.
V DCIN V DD V BAT V SWOUT
ADE5166/ADE5169/ADE5566/ADE5569
stable power supply to the ADE5166/ADE5169/ADE5566/
ADE5569, as long as the external battery voltage is above 2.75 V.
It allows continuous code execution even while the internal power
supply is switching from V DD to V BAT and back. Note that the energy
metering ADCs are not available when V BAT is used for V SWOUT .
Power supply management (PSM) interrupts can be enabled to
indicate when battery switchover occurs and when the V DD power
supply is restored (see the Power Supply Management (PSM)
Interrupt section).
Switching from V DD to V BAT
The following three events switch the internal power supply
(V SWOUT ) from V DD to V BAT :
? V DCIN < 1.2 V. When V DCIN falls below 1.2 V, V SWOUT switches
from V DD to V BAT . This event is enabled when the BATPRG
bits (Bits[1:0]) in the battery switchover configuration SFR
(BATPR, Address 0xF5) are set to 0b01.
ADC
LDO
V INTD
MCU
?
V DD < 2.75 V. When V DD falls below 2.75 V, V SWOUT switches
from V DD to V BAT . This event is enabled when the BATPRG
BCTRL
POWER SUPPLY
MANAGEMENT
V SW
LDO
V INTA
ADE
?
bits in the BATPR SFR are cleared.
Falling edge on BCTRL. When the battery control pin,
ADC
SPI/I 2 C
BCTRL, goes low, V SWOUT switches from V DD to V BAT . This
external switchover signal can trigger a switchover to V BAT
SCRATCH PAD LCD
TEMPERATURE ADC
RTC
3.3V
UART
2.5V
at any time. Setting the INT1PRG bits (Bits[3:1]) to 0bX01 in
the interrupt pins configuration SFR (INTPR, Address 0xFF)
enables the BCTRL pin (see Table 17).
Figure 32. Power Supply Architecture
The ADE5166/ADE5169/ADE5566/ADE5569 provide automatic
battery switchover between V DD and V BAT based on the voltage
level detected at V DD or V DCIN . In addition, the BCTRL input can be
used to trigger a battery switchover. The conditions for switching
V SWOUT from V DD to V BAT and back to V DD are described in the
Battery Switchover section. V DCIN is an input pin that can be con-
nected to a dc signal of 0 V to 3.3 V. This input is intended for
power supply supervisory purposes and does not provide power
to the ADE5166/ADE5169/ADE5566/ADE5569 circuitry (see
the Battery Switchover section).
BATTERY SWITCHOVER
The ADE5166/ADE5169/ADE5566/ADE5569 monitor V DD ,
V BAT , and V DCIN . Automatic battery switchover from V DD to V BAT
can be configured based on the status of the V DD , V DCIN , or BCTRL
pin. Battery switchover is enabled by default. Setting Bit 1 in the
battery switchover configuration SFR (BATPR, Address 0xF5)
disables battery switchover so that V DD is always connected to
V SWOUT (see Table 19). The source of V SWOUT is indicated by Bit 6
in the peripheral configuration SFR (PERIPH, Address 0xF4),
which is described in Table 20. Bit 6 is set when V SWOUT is con-
nected to V DD and cleared when V SWOUT is connected to V BAT .
The battery switchover functionality provided by the ADE5166/
ADE5169/ADE5566/ADE5569 allows a seamless transition from
V DD to V BAT . An automatic battery switchover option ensures a
Switching from V BAT to V DD
To switch V SWOUT from V BAT to V DD , all of the following events
must be true:
? V DD > 2.75 V. V SWOUT switches back to V DD after V DD remains
above 2.75 V.
? V DCIN > 1.2 V and V DD > 2.75 V. If the low V DCIN condition
is enabled, V SWOUT switches to V DD after V DCIN remains
above 1.2 V and V DD remains above 2.75 V.
? Rising edge on BCTRL. If the battery control pin is enabled,
V SWOUT switches back to V DD after BCTRL is high, and the
first or second bullet point is satisfied.
POWER SUPPLY MANAGEMENT (PSM) INTERRUPT
The power supply management (PSM) interrupt alerts the 8052
core of power supply events. The PSM interrupt is disabled by
default. Setting Bit 1 (EPSM) in the Interrupt Enable and Priority 2
SFR (IEIP2, Address 0xA9) enables the PSM interrupt (see
Table 83).
The power management interrupt enable SFR (IPSME,
Address 0xEC) controls the events that result in a PSM interrupt
(see Table 21).
Figure 33 illustrates how the PSM interrupt vector is shared among
the PSM interrupt sources. The PSM interrupt flags are latched
and must be cleared by writing to the power management interrupt
flag SFR (IPSMF, Address 0xF8), as described in Table 18.
Rev. D | Page 31 of 156
相关PDF资料 |
PDF描述 |
|---|---|
| FIN1.00RD | FIREFLEX FIBERGLASS 1" RED 50' |
| ISL6612AIBZ-T | IC MOSFET DRVR SYNC BUCK 8-SOIC |
| V48C48H75BG3 | CONVERTER MOD DC/DC 48V 75W |
| ACM06DSEP-S243 | CONN EDGECARD 12POS .156 EYELET |
| ADE7858ACPZ-RL | IC ENERGY METERING 3PH 40LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADE5169ASTZF62-RL | 功能描述:IC METER/8052/RTC/LCD DRV 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE5566 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver |
| ADE5566ASTZF62 | 功能描述:IC ENERGY METERING 1PHASE 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE5566ASTZF62 | 制造商:Analog Devices 功能描述:Energy Management IC |
| ADE5566ASTZF62-RL | 功能描述:IC ENERGY METERING 1PHASE 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
发布紧急采购，3分钟左右您将得到回复。