参数资料
型号: ADE7116ASTZF8-RL
厂商: Analog Devices Inc
文件页数: 145/152页
文件大小: 0K
描述: IC ENERGY METER 64-LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,500
输入阻抗: 770 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2V
电压 - 低输入/输出: 0.8V
电流 - 电源: 4mA
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 带卷 (TR)
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Table 163. Port 0 Alternate Functions
Pin No.
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Alternate Function
BCTRL external battery control input
INT1 external interrupt
INT1 wake-up from PSM2 operating mode
FP19 LCD segment pin
CF1 ADE calibration frequency output
CF2 ADE calibration frequency output
MOSI SPI data line
SDATA I 2 C data line
MISO SPI data line
SCLK serial clock for I 2 C or SPI
T0 Timer 0 input
SS SPI slave select input for SPI in slave mode
SS SPI slave select output for SPI in master mode
T1 Timer 1 input
Alternate Function Enable
Set INT1PROG = X01 in the interrupt pins configuration SFR (INTPR,
Address 0xFF).
Set EX1 in the interrupt enable SFR (IE, Address 0xA8).
Set INT1PROG = 11X in the interrupt pins configuration SFR (INTPR,
Address 0xFF).
Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED).
Clear the DISCF1 bit in the ADE energy measurement internal MODE1
register (Address 0x0B).
Clear the DISCF2 bit in the ADE energy measurement internal MODE1
register (Address 0x0B).
Set the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the
SPIEN bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).
Clear the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the
I2CEN bit in the I 2 C Mode SFR (I2CMOD, Address 0xE8).
Set the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the
SPIEN bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).
Set the I2CEN bit in the I 2 C Mode SFR (I2CMOD, Address 0xE8) or the SPIEN bit
in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9) to enable the I 2 C or
SPI interface.
Set the C/T0 bit in the Timer/Counter 0 and Timer/Counter 1 Mode SFR (TMOD,
Address 0x89) to enable T0 as an external event counter.
Set the SS_EN bit in the SPI configuration SFR 1 (SPIMOD1, Address 0xE8).
Set the SPIMS_b bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).
Set the C/T1 bit in the timer/counter 0 and timer/counter 1 mode SFR (TMOD,
Address 0x89) to enable T1 as an external event counter.
Table 164. Port 1 Alternate Functions
Pin No.
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Alternate Function
RxD receiver data input for UART
Rx edge wake-up from PSM2 operating mode
TxD transmitter data output for UART
FP25 LCD segment pin
FP24 LCD segment pin
T2EX Timer 2 control input
FP23 LCD segment pin
T2 Timer 2 input
FP22 LCD segment pin
FP21 LCD segment pin
FP20 LCD segment pin
Alternate Function Enable
Set the REN bit in the serial communications control register bit description
SFR (SCON, Address 0x98).
Set RXPROG[1:0] = 11 in the peripheral configuration SFR (PERIPH, Address
0xF4).
This pin becomes TxD as soon as data is written into SBUF.
Set FP25EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Set FP24EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Set EXEN2 in the timer/counter 2 control SFR (T2CON, Address 0xC8).
Set FP23EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Set the C/T2 bit in the timer/counter 2 control SFR (T2CON, Address 0xC8) to
enable T2 as an external event counter.
Set FP22EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Set FP21EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Set FP20EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).
Table 165. Port 2 Alternate Functions
Pin No.
P2.0
P2.1
P2.2
P2.3
Alternate Function
FP18 LCD segment pin
FP17 LCD segment pin
FP16 LCD segment pin
SDEN serial download pin sampled on reset.
Alternate Function Enable
Set FP18EN in the LCD segment enable 2 SFR (LCDSEGE2, Address 0xED).
Set FP17EN in the LCD Segment enable 2 SFR (LCDSEGE2, Address 0xED).
Set FP16EN in the LCD segment enable 2 SFR (LCDSEGE2, Address 0xED).
Enabled by default.
P2.3 is an output only.
Rev. B | Page 145 of 1 52
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