参数资料
| 型号： | ADE7116ASTZF8-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 69/152页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER 64-LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 1,500 |
| 输入阻抗： | 770 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 4mA |
| 电源电压： | 2.4 V ~ 3.7 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 带卷 (TR) |
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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
The reactive energy accumulation depends on the setting of the
SAVARM and ABSVARM bits in the ACCMODE register
(Address 0x0F). When both bits are cleared, the addition is
signed and, therefore, negative energy is subtracted from the
reactive energy contents. When both bits are set, the
ADE7169/ADE7569 are set to be in the more restrictive mode,
which is the absolute accumulation mode. When the SAVARM
bit (Bit 2) in the ACCMODE register (Address 0x0F) is set, the
reactive power is accumulated depending on the sign of the
active power. When the active power is positive, the reactive
power is added as it is to the reactive energy register. When the
active power is negative, the reactive power is subtracted from
the reactive energy accumulator (see the Var Antitamper
Accumulation Mode section).
When the ABSVARM bit (Bit 3) in the ACCMODE register
(Address 0x0F) is set, the absolute reactive power is used for
the reactive energy accumulation (see the Var Absolute
Accumulation Mode section).
The output of the multiplier is divided by VARDIV. If the value
in the VARDIV register (Address 0x25) is equal to 0, the internal
reactive energy register is divided by 1. VARDIV is an 8-bit,
unsigned register. After dividing by VARDIV, the reactive
energy is accumulated in a 49-bit internal energy accumulation
register. The upper 24 bits of this register are accessible through
a read to the reactive energy register (VARHR[23:0], Address
0x04). A read to the RVAHR register (Address 0x08) returns the
content of the VARHR register, and the upper 24 bits of the
internal register are cleared.
As shown in Figure 72, the reactive power signal is accumulated
in an internal 49-bit, signed register. The reactive power signal
can be read from the waveform register by setting the WAVMODE
register (Address 0x0D) and setting the WFSM bit (Bit 5) in the
Interrupt Enable 3 SFR (MIRQENH, Address 0xDB). Like the
current and voltage channel waveform sampling modes, the wave-
form data is available at sample rates of 25.6 kSPS, 12.8 kSPS,
6.4 kSPS, and 3.2 kSPS.
Figure 67 shows this energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. These curves also apply for
the reactive energy accumulation.
Note that the energy register contents roll over to full-scale
negative (0x800000) and continue to increase in value when the
power or energy flow is positive. Conversely, if the power is
negative, the energy register underflows to full-scale positive
(0x7FFFFF) and continues to decrease in value.
Using the Interrupt Enable 2 SFR (MIRQENM, Address 0xDA),
the ADE7169/ADE7569 can be configured to issue an ADE
interrupt to the 8052 core when the reactive energy register is
half-full (positive or negative) or when an overflow or
underflow occurs.
FOR WAVEFORM
SAMPLING
23
VARHR[23:0]
0
UPPER 24 BITS ARE
ACCESSIBLE THROUGH
VARHR[23:0] REGISTER
CURRENT
CHANNEL
HPF
90° PHASE
SHIFTING FILTER
Π
VAROS[15:0]
sgn 2 6 2 5 2 –6 2 –7 2 –8
VARDIV[7:0]
2
LPF2
+
+
%
+
48
0
VOLTAGE
CHANNEL
PHCAL[7:0]
VARGAIN[11:0]
+
REACTIVE POWER
SIGNAL
TO
DIGITAL-TO-FREQUENCY
CONVERTER
OUTPUTS FROM THE LPF2 ARE
ACCUMULATED (INTEGRATED) IN
THE INTERNAL REACTIVE ENERGY
REGISTER
T
5
CLKIN
WAVEFORM
REGISTER
VALUES
TIME (nT)
Figure 72. Reactive Energy Calculation
Rev. B | Page 69 of 152
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