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参数资料
| 型号： | ADE7752AARZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/24页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 3PHASE 24SOIC |
| 标准包装： | 1,000 |
| 输入阻抗： | 450 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 6mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 3 相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADE7752AEBZ-ND - BOARD EVALUATION FOR ADE7752A |
ADE7752/ADE7752A
As the voltage and current inputs respect Equations 5 and 6, the
total real power ( P ) is
frequencies when using all three channel inputs.
P = ? ? 2 × V A × cos ( ω l t ) ? 2 × V C × cos ? ω l t +
? ?
+ ? ? 2 × V B × cos ? ω l t +
? ? v 2 × V C × cos ? ω l t +
× 2 × I B × cos ? ω l t +
?
4 π ? ?
3 ? ? ?
P = ( V A ? V C ) ( I AP ? I AN ) + ( V B ? V C ) × ( I BP ? I BN )
? ? 4 π ? ?
?
? ? 3 ? ?
× 2 × I A × cos ( ω l t )
? ? 2 π ? ?
? ? 3 ? ?
? 2 π ?
? 3 ?
? ?
Table 6. Maximum Output Frequency on F1 and F2
Max Frequency for Max Frequency for
SCF S1 S0 AC Inputs (Hz) DC Inputs (Hz)
0 0 0 0.51 1.02
1 0 0 0.48 0.96
0 0 1 2.04 4.09
1 0 1 1.91 3.84
0 1 0 7.67 15.35
1
1
0
7.67
15.35
For simplification, assume that ? A = ? B = ? C = 0 and
V A = V B = V C = V . The preceding equation becomes:
B
B
0
1
1
1
1
1
30.70
0.24
61.4
0.48
P = 2 × V × I A × sin ? ?
? × cos ( ω l t )
? × sin ? ω l t +
+ 2 × V × I B × sin ? ? ? ? × sin ( ω l t + π ) × cos ? ? ω l t +
?
P = V AN A × ? ? sin ?
× I
? + sin ? 2 ω l t +
? ?
+ V BN B × ? ? sin ? ? + sin ? 2 ω l t + ? ? ?
× I
2 π ? ? 2 π ?
? 3 ? ? 3 ?
? 3 ? ? 3 ?
P then becomes:
? ? 2 π ? ? 2 π ? ?
?
? ? 3 ? ? 3 ? ?
? ? π ? ? π ? ?
? ? 3 ? ? 3 ? ?
where V AN = V × sin(2 π /3) and V BN = V × sin( π /3).
π 2 π ?
(9)
(10)
FREQUENCY OUTPUT CF
The pulse output calibration frequency (CF) is intended for use
during calibration. The output pulse rate on CF can be up to
160 times the pulse rate on F1 and F2. The lower the F 1–7
frequency selected, the higher the CF scaling. Table 7 shows
how the two frequencies are related, depending on the states of
the logic inputs S0, S1, and SCF. Because of its relatively high
pulse rate, the frequency at this logic output is proportional to
the instantaneous real power. As with F1 and F2, the frequency
is derived from the output of the low-pass filter after multiplica-
tion. However, because the output frequency is high, this real
power information is accumulated over a much shorter time.
Thus, less averaging is carried out in the digital-to-frequency
As the LPF on each channel eliminates the 2 ω l component of
the equation, the real power measured by the ADE7752 is
conversion. With much less averaging of the real power signal,
the CF output is much more responsive to power fluctuations.
P = V AN × I A ×
3
2
+ V BN × I B ×
3
2
Table 7. Maximum Output Frequency on CF
If full-scale ac voltage of ±500 mV peak is applied to the voltage
channels and current channels, the expected output frequency
is calculated as follows:
F 1 ? 7 = 0 . 60 Hz , SCF = S 0 = S 1 = 1
SCF
0
1
0
1
S1
0
0
0
0
S0
0
0
1
1
F 1–7 (Hz)
1.27
1.19
5.09
4.77
CF Max for AC Signals (Hz)
160 × F1, F2 = 81.87
8 × F1, F2 = 3.83
160 × F1, F2 = 327.46
16 × F1, F2 = 30.70
V AN = V BN = I A = I B = I C = 500 m V peak ac =
V CN = I C = 0
V REF = 2 . 4 V nominal reference value
0 . 5
2
V rms
0
1
0
1
1
1
1
1
0
0
1
1
19.07
19.07
76.29
0.60
16 × F1, F2 = 122.81
8 × F1, F2 = 61.40
8 × F1, F2 = 245.61
16 × F1, F2 = 3.84
Note that if the on-chip reference is used, actual output fre-
quencies may vary from device to device due to reference
tolerance of ±8%.
2 × 2 × 2 . 4
× = 0 . 139 Hz
Freq = 2 ×
6 . 181 × 0 . 5 × 0 . 5 × 0 . 60
2
3
2
Rev. C | Page 21 of 24
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