- 您现在的位置：买卖IC网 > PDF目录9106 > ADF4113HVBCPZ-RL7 (Analog Devices Inc)IC CHARGE PUMP HV SYNTH 20-LFCSP PDF资料下载
参数资料
| 型号： | ADF4113HVBCPZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/20页 |
| 文件大小： | 0K |
| 描述： | IC CHARGE PUMP HV SYNTH 20-LFCSP |
| 标准包装： | 1,500 |
| 类型： | 时钟/频率合成器，RF |
| PLL： | 是 |
| 输入： | CMOS，TTL |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:1 |
| 差分 - 输入:输出： | 是/无 |
| 频率 - 最大： | 4GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 20-LFCSP-VQ |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADF4113HVEB1Z-ND - BOARD EVALUATION FOR ADF4113HV EVAL-ADF4113EBZ2-ND - BOARD EVAL FOR ADF4113 1750MHZ EVAL-ADF4113EBZ1-ND - BOARD EVAL FOR ADF4113 EVAL-ADF411XEBZ1-ND - BOARD EVAL FOR ADF411X NO CHIP |
Data Sheet
ADF4113HV
Rev. B | Page 9 of 20
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The reference input stage is shown in Figure 14. SW1 and SW2
are normally closed switches (NC in Figure 14). SW3 is normally
open (NO in Figure 14). When power-down is initiated, SW3 is
closed and SW1 and SW2 are opened. This ensures that there is
no loading of the REFIN pin on power-down.
BUFFER
TO R COUNTER
REFIN
100k
NC
SW2
SW3
NO
NC
SW1
POWER-DOWN
CONTROL
06
22
3-
0
14
Figure 14. Reference Input Stage
RF INPUT STAGE
The RF input stage is shown in Figure 15. It is followed by a
two-stage limiting amplifier to generate the current-mode logic
(CML) clock levels needed for the prescaler.
AVDD
AGND
500
1.6V
BIAS
GENERATOR
RFINA
RFINB
0
622
3-
0
15
Figure 15. RF Input Stage
PRESCALER (P/P + 1)
Together with the A and B counters, the dual-modulus prescaler
(P/P + 1) enables the large division ratio, N, to be realized by
N = BP + A
The dual-modulus prescaler, operating at CML levels, takes the
clock from the RF input stage and divides it down to a manageable
frequency for the CMOS A and CMOS B counters. The pre-
scaler is programmable; it can be set in software to 8/9, 16/17,
32/33, or 64/65. It is based on a synchronous 4/5 core.
A AND B COUNTERS
The A and B CMOS counters combine with the dual-modulus
prescaler to allow a wide ranging division ratio in the PLL
feedback counter. The counters are specified to work when the
prescaler output is 200 MHz or less (for AVDD = 5 V). Thus,
with an RF input frequency of 2.5 GHz, a prescaler value of
16/17 is valid but a value of 8/9 is not.
Pulse Swallow Function
The A and B counters, in conjunction with the dual-modulus
prescaler, make it possible to generate output frequencies that
are spaced only by the reference frequency divided by R. The
equation for the VCO frequency is
fVCO = [(P × B) + A]fREFIN/R
where:
fVCO = output frequency of external voltage controlled
oscillator (VCO).
P = preset modulus of dual-modulus prescaler.
B = preset divide ratio of binary 13-bit counter (3 to 8191).
A = preset divide ratio of binary 6-bit swallow counter (0 to 63).
fREFIN = output frequency of the external reference frequency
oscillator.
R = preset divide ratio of binary 14-bit programmable reference
counter (1 to 16,383).
13-BIT B
COUNTER
6-BIT A
COUNTER
PRESCALER
P/P + 1
FROM RF
INPUT STAGE
MODULUS
CONTROL
N= BP + A
LOAD
TO PFD
0
62
23
-01
6
Figure 16. A and B Counters
R COUNTER
The 14-bit R counter allows the input reference frequency to be
divided down to produce the reference clock to the phase fre-
quency detector (PFD). Division ratios from 1 to 16,383 are
allowed.
相关PDF资料 |
PDF描述 |
|---|---|
| VE-24N-IV | CONVERTER MOD DC/DC 18.5V 150W |
| VI-27Y-MW-F4 | CONVERTER MOD DC/DC 3.3V 66W |
| VI-BW3-MV-S | CONVERTER MOD DC/DC 24V 150W |
| VE-24M-IV | CONVERTER MOD DC/DC 10V 150W |
| SY58019UMI | IC MUX 2:1 10.7BGPS DIFF 16-MLF |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADF4113HVBRUZ | 功能描述:IC CHARGE PUMP HV SYNTH 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP（0.175"，4.40mm 宽） 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ADF4113HVBRUZ-RL | 功能描述:IC CHARGE PUMP HV SYNTH 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ADF4113HVBRUZ-RL7 | 功能描述:IC CHARGE PUMP HV SYNTH 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ADF4113HVSD1Z | 制造商:Analog Devices 功能描述:- Rail/Tube |
| ADF4116 | 制造商:AD 制造商全称:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
发布紧急采购，3分钟左右您将得到回复。