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| 型号： | ADG1407BRUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/20页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER 8X1 28TSSOP |
| 产品培训模块： | iCMOS™ Switches and Multiplexers for Data Acquisition Switch Fundamentals |
| 标准包装： | 50 |
| 系列： | iCMOS® |
| 功能： | 多路复用器 |
| 电路： | 1 x 8:1 |
| 导通状态电阻： | 21.5 欧姆 |
| 电压电源： | 单/双电源 |
| 电压 - 电源，单路/双路(±)： | 5 V ~ 16.5 V，±2.25 V ~ 8.25 V |
| 电流 - 电源： | 150µA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
| 产品目录页面： | 801 (CN2011-ZH PDF) |
ADG1406/ADG1407
Rev. A | Page 9 of
20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
VDD
28
D
2
NC
27
VSS
3
NC
26
S8
4
S16
25
S7
5
S15
24
S6
6
S14
23
S5
7
S13
22
S4
8
S12
21
S3
9
S11
20
S2
10
S10
19
S1
11
S9
18
EN
12
GND
17
A0
13
NC
16
A1
14
A3
15
A2
ADG1406
TOP VIEW
(Not to Scale)
NC = NO CONNECT
07
41
9-
0
03
Figure 3. ADG1406 TSSOP Pin Configuration
PIN 1
INDICATOR
1
S16
2
S15
3
S14
4
S13
5
S12
6
S11
7
S10
8
S9
24 S8
23 S7
22 S6
21 S5
20 S4
19 S3
18 S2
17 S1
9
G
N
D
10
A
3
11
A
2
12
N
C
13
N
C
14
A
1
15
A
0
16
E
N
32
N
C
31
V
D
30
N
C
29
D
28
N
C
27
N
C
26
N
C
25
V
S
TOP VIEW
(Not to Scale)
ADG1406
07
41
9-
0
04
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
Figure 4. ADG1406 LFCSP Pin Configuration
Table 9. ADG1406 Pin Function Descriptions
Pin No.
TSSOP
LFCSP_VQ
Mnemonic
Description
1
31
VDD
Most Positive Power Supply Potential.
2, 3, 13
12, 13, 26,
27, 28, 30, 32
NC
No Connect.
4
1
S16
Source Terminal 16. This pin can be an input or an output.
5
2
S15
Source Terminal 15. This pin can be an input or an output.
6
3
S14
Source Terminal 14. This pin can be an input or an output.
7
4
S13
Source Terminal 13. This pin can be an input or an output.
8
5
S12
Source Terminal 12. This pin can be an input or an output.
9
6
S11
Source Terminal 11. This pin can be an input or an output.
10
7
S10
Source Terminal 10. This pin can be an input or an output.
11
8
S9
Source Terminal 9. This pin can be an input or an output.
12
9
GND
Ground (0 V) Reference.
14
10
A3
Logic Control Input.
15
11
A2
Logic Control Input.
16
14
A1
Logic Control Input.
17
15
A0
Logic Control Input.
18
16
EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are
turned off. When this pin is high, the Ax logic inputs determine which switch is turned on.
19
17
S1
Source Terminal 1. This pin can be an input or an output.
20
18
S2
Source Terminal 2. This pin can be an input or an output.
21
19
S3
Source Terminal 3. This pin can be an input or an output.
22
20
S4
Source Terminal 4. This pin can be an input or an output.
23
21
S5
Source Terminal 5. This pin can be an input or an output.
24
22
S6
Source Terminal 6. This pin can be an input or an output.
25
23
S7
Source Terminal 7. This pin can be an input or an output.
26
24
S8
Source Terminal 8. This pin can be an input or an output.
27
25
VSS
Most Negative Power Supply Potential. In single-supply applications, this pin can be
connected to ground. The exposed pad is tied to the substrate, VSS.
28
29
D
Drain Terminal. This pin can be an input or an output.
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