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| 型号： | ADG1407BRUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER 8X1 28TSSOP |
| 产品培训模块： | iCMOS™ Switches and Multiplexers for Data Acquisition Switch Fundamentals |
| 标准包装： | 50 |
| 系列： | iCMOS® |
| 功能： | 多路复用器 |
| 电路： | 1 x 8:1 |
| 导通状态电阻： | 21.5 欧姆 |
| 电压电源： | 单/双电源 |
| 电压 - 电源，单路/双路(±)： | 5 V ~ 16.5 V，±2.25 V ~ 8.25 V |
| 电流 - 电源： | 150µA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
| 产品目录页面： | 801 (CN2011-ZH PDF) |
ADG1406/ADG1407
Rev. A | Page 11 of
20
1
VDD
28
DA
2
DB
27
VSS
3
NC
26
S8A
4
S8B
25
S7A
5
S7B
24
S6A
6
S6B
23
S5A
7
S5B
22
S4A
8
S4B
21
S3A
9
S3B
20
S2A
10
S2B
19
S1A
11
S1B
18
EN
12
GND
17
A0
13
NC
16
A1
14
NC
15
A2
ADG1407
TOP VIEW
(Not to Scale)
NC = NO CONNECT
07
41
9-
0
36
Figure 5. ADG1407 TSSOP Pin Configuration
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
PIN 1
INDICATOR
1
S8B
2
S7B
3
S6B
4
S5B
5
S4B
6
S3B
7
S2B
8
S1B
24 S8A
23 S7A
22 S6A
21 S5A
20 S4A
19 S3A
18 S2A
17 S1A
9
G
N
D
10
A
2
11
N
C
12
N
C
13
N
C
14
A
1
15
A
0
16
E
N
32
N
C
31
D
B
30
V
D
29
N
C
28
N
C
27
D
A
26
N
C
25
V
S
TOP VIEW
(Not to Scale)
ADG1407
07
41
9-
0
37
Figure 6. ADG1407 LFCSP_VQ Pin Configuration
Table 11. ADG1407 Pin Function Descriptions
Pin No.
TSSOP
LFCSP_VQ
Mnemonic
Description
1
29
VDD
Most Positive Power Supply Potential.
2
31
DB
Drain Terminal B. This pin can be an input or an output.
3, 13, 14
11, 12, 13, 26,
28, 30, 32
NC
No Connect.
4
1
S8B
Source Terminal 8B. This pin can be an input or an output.
5
2
S7B
Source Terminal 7B. This pin can be an input or an output.
6
3
S6B
Source Terminal 6B. This pin can be an input or an output.
7
4
S5B
Source Terminal 5B. This pin can be an input or an output.
8
5
S4B
Source Terminal 4B. This pin can be an input or an output.
9
6
S3B
Source Terminal 3B. This pin can be an input or an output.
10
7
S2B
Source Terminal 2B. This pin can be an input or an output.
11
8
S1B
Source Terminal 1B. This pin can be an input or an output.
12
9
GND
Ground (0 V) Reference.
15
10
A2
Logic Control Input.
16
14
A1
Logic Control Input.
17
15
A0
Logic Control Input.
18
16
EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are
turned off. When this pin is high, the Ax logic inputs determine which switch is turned on.
19
17
S1A
Source Terminal 1A. This pin can be an input or an output.
20
18
S2A
Source Terminal 2A. This pin can be an input or an output.
21
19
S3A
Source Terminal 3A. This pin can be an input or an output.
22
20
S4A
Source Terminal 4A. This pin can be an input or an output.
23
21
S5A
Source Terminal 5A. This pin can be an input or an output.
24
22
S6A
Source Terminal 6A. This pin can be an input or an output.
25
23
S7A
Source Terminal 7A. This pin can be an input or an output.
26
24
S8A
Source Terminal 8A. This pin can be an input or an output.
27
25
VSS
Most Negative Power Supply Potential. In single-supply applications, this pin can be
connected to ground. The exposed pad is tied to the substrate, VSS.
28
27
DA
Drain Terminal A. This pin can be an input or an output.
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