参数资料
型号: ADG3123BRUZ-REEL7
厂商: Analog Devices Inc
文件页数: 1/12页
文件大小: 0K
描述: IC LEVEL TRANSLATOR 8CH 20-TSSOP
标准包装: 1,000
逻辑功能: 变换器
位数: 8
输入类型: CMOS
输出类型: 电压
通道数: 8
输出/通道数目: 1
差分 - 输入:输出: 无/无
传输延迟(最大): 125ns
电源电压: 2.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
8-Channel CMOS Logic to
High Voltage Level Translator
Data Sheet
Rev. B
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rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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Tel: 781.329.4700
2005–2013 Analog Devices, Inc. All rights reserved.
FEATURES
2.3 V to 5.5 V input voltage range
Output voltage levels (VDDA and VDDB to VSS ≤ 35 V)
Low output voltage levels: down to 24.2 V
High output voltage levels: up to +35 V
Rise/fall time: 12 ns/19.5 ns typical
Propagation delay: 80 ns typical
Operating frequency: 100 kHz typical
Ultralow quiescent current: 65 μA typical
20-lead, Pb-free, TSSOP package
APPLICATIONS
Low voltage to high voltage translation
TFT-LCD panels
Piezoelectric motor drivers
FUNCTIONAL BLOCK DIAGRAM
05655-
001
VDDA
ADG3123
VDDB
Y6
Y5
Y4
Y3
Y2
Y1
6
CHANNELS
A1
A2
A3
A4
A5
A6
Y8
Y7
VSS
A7
GND
A8
2
CHANNELS
Figure 1.
GENERAL DESCRIPTION
The ADG3123 is an 8-channel, noninverting CMOS to high
voltage level translator. Fabricated on an enhanced LC2MOS
process, the device is capable of operating at high supply
voltages while maintaining ultralow power consumption.
The internal architecture of the device ensures compatibility with
logic circuits running from supply voltages within the 2.3 V to
5.5 V range. The voltages applied to Pin VDDA, Pin VDDB, and
Pin VSS set the logic levels available at the outputs on the Y side
of the device. Pin VDDA and Pin VDDB set the high output level
for Pin Y1 to Pin Y6 and for Pin Y7 to Pin Y8, respectively. The
VSS pin sets the low output level for all channels. The ADG3123
can provide output voltages levels down to 24.2 V for a low input
level and up to +35 V for a high input logic level. For proper
operation, VDDB must always be greater than or equal to VDDA
and the voltage between the Pin VDDB and Pin VSS should not
exceed 35 V.
The low output impedance of the channels guarantees fast rise
and fall times even for significant capacitive loads. This feature,
combined with low propagation delay and low power consumption,
makes the ADG3123 an ideal driver for TFT-LCD panel
applications.
The ADG3123 is guaranteed to operate over the 40°C to +85°C
temperature range and is available in a compact, 20-lead TSSOP,
Pb-free package.
PRODUCT HIGHLIGHTS
1. Compatible with a wide range of CMOS logic levels.
2. High output voltage levels.
3. Fast rise and fall times coupled with low propagation delay.
4. Ultralow power consumption.
5. Compact, 20-lead TSSOP, RoHS-compliant package.
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