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参数资料
| 型号： | ADM00398 |
| 厂商： | Microchip Technology |
| 文件页数： | 12/17页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR 16BIT MCU MCP3911 |
| 设计资源： | MCP3911 Eval Brd Schematics ADM00398 BOM ADM00398 Gerber Files |
| 标准包装： | 1 |
| 类型： | MCU |
| 适用于相关产品： | MCP3911，PIC24FJ256GA110 |
| 所含物品： | 板，线缆 |
MCP3911
DS22286A-page 4
2012 Microchip Technology Inc.
Gain Error Drift
1
ppm/°C
INL
Integral Non-Linearity
5
ppm
ZIN
Differential Input Impedance
232
—
k
Ω
G=1, proportional to 1/
AMCLK
142
—
k
Ω
G=2, proportional to 1/
AMCLK
72
—
k
Ω
G=4, proportional to 1/
AMCLK
38
—
k
Ω
G=8, proportional to 1/
AMCLK
36
—
k
Ω
G=16, proportional to 1/
AMCLK
33
—
k
Ω
G=32, proportional to 1/
AMCLK
SINAD
Signal-to-Noise and Distortion
Ratio (Note 1)
92
94.5
—
dB
THD
Total Harmonic Distortion
-106.5
-103
dBc
Includes the first 35 har-
monics
SNR
Signal to Noise Ratio (Note 1)
92
95
dB
SFDR
Spurious Free Dynamic Range
111
dBFS
CTALK
Crosstalk (50, 60 Hz)
—
-122
—
dB
AC PSRR
AC Power Supply Rejection
—
-73
—
dB
AVDD = DVDD = 3.3V +
0.6Vpp, 50/60 Hz,
100/120 Hz
DC PSRR
DC Power Supply Rejection
—
-73
—
dB
AVDD = DVDD = 2.7V to
3.6V
DC CMRR
DC Common Mode Rejection
—
-105
—
dB
VCM from -1V to +1V
Internal Voltage Reference
VREF
Tolerance
1.176
1.2
1.224
V
VREFEXT = 0, TA =
25°C only
TCVREF
Temperature Coefficient
—
7
—
ppm/°C TA = -40°C to +125°C,
VREFEXT = 0
TABLE 1-1:
ANALOG SPECIFICATIONS TARGET TABLE (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 2.7V to 3.6V, MCLK =
4 MHz; PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT=0, CLKEXT=1, AZ_FREQ=0, DITHER<1:0>=11,
BOOST<1:0> = 10; VCM=0V; TA = -40°C to +125°C; VIN = 1.2 VPP = 424 mVRMS @ 50/60 Hz on both channels.
Sym
Characteristic
Min
Typ
Max
Units
Test Conditions
Note 1:
This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or
instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range, VIN =
1.2VPP = 424 mVRMS, VREF = 1.2V @ 50/60 Hz. See terminology section for definition. This parameter is established
by characterization and not 100% tested. See performance graphs for other than default settings provided here.
2:
For these operating currents the following configuration bit settings apply: SHUTDOWN<1:0>=00, RESET<1:0>=00,
VREFEXT=0, CLKEXT=0.
3:
For these operating currents the following configuration bit settings apply: SHUTDOWN<1:0>=11, VREFEXT=1,
CLKEXT=1.
4:
Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical per-
formance.
5:
Outside of this range, ADC accuracy is not specified. An extended input range of +/-2 V can be applied continuously to
the part with no damage.
6:
For proper operation, and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
the Table 5-2 as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the pres-
caler settings (PRE<1:0>) limit AMCLK=MCLK/PRESCALE in the defined range in the Table 5-2.
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