参数资料
型号: ADM1026JST
厂商: ON Semiconductor
文件页数: 37/55页
文件大小: 0K
描述: IC CNTRL SYS REF/EEPROM 48LQFP
产品变化通告: MFG CHG Notification ADI to ON Semi
Product Obsolescence 30/Sept/2009
标准包装: 250
功能: 硬件监控器
传感器类型: 内部和外部
感应温度: 0°C ~ 100°C
精确度: ±3°C(最小值)
拓扑: ADC,比较器,多路复用器,寄存器库
输出类型: SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 5.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 管件
ADM1026
Detailed Register Descriptions
Table 14. REGISTER 00H, CONFIGURATION REGISTER 1 (POWER-ON DEFAULT 00H)
Bit
0
1
2
3
4
5
6
7
Name
Monitor = 0
Int Enable = 0
Int Clear = 0
Enable Voltage/Ext2 = 0
Enable THERM = 0
Enable DAC AFC = 0
Enable PWM AFC = 0
Software Reset = 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When this bit is set the ADM1026 monitors all voltage, temperature and fan
channels in a round robin manner.
When this bit is set, the INT output pin is enabled.
Setting this bit clears an interrupt from the voltage, temperature or fan speed
channels. Because GPIO interrupts are level triggered, this bit has no effect on
interrupts originating from GPIO channels. This bit is cleared by writing a 0 to it. If
in monitoring mode voltages, temperatures and fan speeds continue to be
monitored after writing to this bit to clear an interrupt, so an interrupt may be set
again on the next monitoring cycle.
When this bit is 1, the ADM1026 monitors voltage (A IN8 and A IN9 ) on Pins 28
and 27, respectively. When this bit is 0, the ADM1026 monitors a second thermal
diode temperature channel, D2, on these pins. If the second thermal diode channel
is not being used, it is recommended that the bit be set to 1.
When this bit is 1, the THERM pin (Pin 42) is asserted (go low) if any of the
THERM limits are exceeded. If THERM is pulled low as an input, the DAC and
PWM outputs are forced to full scale until THERM is taken high.
When this bit is 1, the DAC output is enabled for automatic fan speed control
(AFC) based on temperature. When this bit is 0, the DAC Output reflects the value
in Reg 04h, the DAC Control Register.
When this bit is 1, the PWM output is enabled for automatic fan speed control
(AFC) based on temperature. When this bit is 0, the PWM Output reflects the value
in Reg 05h, the PWM Control Register.
Writing a 1 to this bit restores all registers to the power-on defaults. This bit is
cleared by writing a 0 to it. For more info, see the Software Reset Function section.
Table 15. REGISTER 01H, CONFIGURATION REGISTER 2 (POWER-ON DEFAULT 00H)
Bit
0
1
2
3
4
5
6
7
Name
Enable GPIO0/Fan0 = 0
Enable GPIO1/Fan1 = 0
Enable GPIO2/Fan2 = 0
Enable GPIO3/Fan3 = 0
Enable GPIO4/Fan4 = 0
Enable GPIO5/Fan5 = 0
Enable GPIO6/Fan6 = 0
Enable GPIO7/Fan7 = 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When this bit is 1, Pin 3 is enabled as a general ? purpose I/O pin (GPIO0),
otherwise it is a fan tach measurement input (Fan 0).
When this bit is 1, Pin 4 is enabled as a general ? purpose I/O pin (GPIO1),
otherwise it is a fan tach measurement input (Fan 1).
When this bit is 1, Pin 5 is enabled as a general ? purpose I/O pin (GPIO2),
otherwise it is a fan tach measurement input (Fan 2).
When this bit is 1, Pin 6 is enabled as a general ? purpose I/O pin (GPIO3),
otherwise it is a fan tach measurement input (Fan 3).
When this bit is 1, Pin 9 is enabled as a general ? purpose I/O pin (GPIO4),
otherwise it is a fan tach measurement input (Fan 4).
When this bit is 1, Pin 10 is enabled as a general ? purpose I/O pin (GPIO5),
otherwise it is a fan tach measurement input (Fan 5).
When this bit is 1, Pin 11 is enabled as a general ? purpose I/O pin (GPIO6),
otherwise it is a fan tach measurement input (Fan 6).
When this bit is 1, Pin 12 is enabled as a general ? purpose I/O pin (GPIO7),
otherwise it is a fan tach measurement input (Fan 7).
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