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| 型号： | ADM1026JSTZ |
| 厂商： | ON Semiconductor |
| 文件页数： | 26/55页 |
| 文件大小： | 0K |
| 描述： | IC CNTRL SYS REF/EEPROM 48LQFP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi Product Discontinuation 30/Sept/2011 |
| 标准包装： | 250 |
| 功能： | 硬件监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | 0°C ~ 100°C |
| 精确度： | ±3°C（最小值） |
| 拓扑： | ADC，比较器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
| 产品目录页面： | 1131 (CN2011-ZH PDF) |
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ADM1026
Configuration Register 2 (Address 01h). Pin 42 is
configured as GPIO16 by setting Bit 0 of Configuration
Register 3, or as the THERM function by clearing this bit.
Each GPIO pin has four data bits associated with it, two
bits in one of the GPIO configuration registers (Addresses
08h to 0Bh), one in the GPIO status registers (Addresses 24h
and 25h), and one in the GPIO mask registers (Addresses
1Ch and 1Dh)
Setting a direction bit = 1 in one of the GPIO configuration
registers makes the corresponding GPIO pin an output.
Clearing the direction bit to 0 makes it an input.
Setting a polarity bit = 1 in one of the GPIO configuration
registers makes the corresponding GPIO pin active high.
Clearing the polarity bit to 0 makes it active low.
When a GPIO pin is configured as an input, the
corresponding bit in one of the GPIO status registers is
read-only, and is set when the input is asserted (“asserted” may
be high or low depending on the setting of the polarity bit).
When a GPIO pin is configured as an output, the
corresponding bit in one of the GPIO status registers
becomes read/write. Setting this bit then asserts the GPIO
output. (Here again, “asserted” may be high or low
depending on the setting of the polarity bit.)
The effect of a GPIO status register bit on the INT output
can be masked out by setting the corresponding bit in one of
the GPIO mask registers. When the pin is configured as an
output, this bit is automatically masked to prevent the data
written to the status bit from causing an interrupt, with the
exception of GPIO16, which must be masked manually by
setting Bit 7 of Mask Register 4 (Reg 1Bh).
When configured as inputs, the GPIO pins may be
connected to external interrupt sources such as temperature
sensors with digital output. Another application of the GPIO
pins would be to monitor a processor’s voltage ID code (VID
code).
ADM1026 Interrupt Structure
The Interrupt Structure of the ADM1026 is shown in
Figure 52. Interrupts can come from a number of sources,
which are combined to form a common INT output. When
INT is asserted, this output pulls low. The INT pin has an
internal, 100 k W pullup resistor.
Analog/Temperature Inputs
As each analog measurement value is obtained and stored
in the appropriate value register, the value and the limits
from the corresponding limit registers are fed to the high and
low limit comparators. The device performs greater than
comparisons to the high limits. An out-of-limit is also
generated if a result is less than or equal to a low limit. The
result of each comparison (1 = out of limit, 0 = in limit) is
routed to the corresponding bit input of Interrupt Status
Register 1, 2, or 4 via a data de-multiplexer, and used to set
that bit high or low as appropriate. Status bits are
self-clearing. If a bit in a status register is set due to an
out-of-limit measurement, it continues to cause INT to be
asserted as long as it remains set, as described later.
However, if a subsequent measurement is in limit, it is reset
and does not cause INT to be reasserted. Status bits are
unaffected by clearing the interrupt.
Interrupt Mask Registers 1, 2, and 4 have bits
corresponding to each of the interrupt status register bits.
Setting an interrupt mask bit high conceals an asserted status
bit from display on Interrupt Pin 17. Setting an interrupt
mask bit low allows the corresponding status bit to be
asserted and displayed on Pin 17. After mask gating, the
status bits are all OR’ed together to produce the analog and
fan interrupt that is used to set a latch. The output of this l atch
is OR’ed with other interrupt sources to produce the INT
output. This pulls low if any unmasked status bit goes high,
that is, when any measured value goes out of limit.
When an INT output caused by an out-of-limit analog/
temperature measurement is cleared by one of the methods
described later, the latch is reset. It is not set again, and INT
is not reasserted until after two local temperature
measurements have been taken, even if the status bit remains
set or a new analog/temperature event occurs, as shown in
Figure 49. This delay corresponds to almost two monitoring
cycles, and is about 530 ms. However, interrupts from other
sources such as a fan or GPIO can still occur. This is
illustrated in Figure 50.
START OF ANALOG
MONITORING
CYCLE
OUT-OF-LIMIT
MEASUREMENT
INT CLEARED
LOCAL
TEMPERATURE
MEASUREMENT
START OF ANALOG
MONITORING
CYCLE OUT-OF-LIMIT
MEASUREMENT
LOCAL
TEMPERATURE
MEASUREMENT
START OF ANALOG
MONITORING
CYCLE
INT
FULL MONITORING CYCLE = 273ms
Figure 49. Delay After Clearing INT Before Reassertion
http://onsemi.com
26
INT RE ? ASSERTED
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| ADM1027ARQ | 功能描述:IC THER CTRL VOLT/MONITOR 24QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 热管理 系列:dBCool® 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
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