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| 型号： | ADM1060ARU-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/52页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR/SEQUENCER 28TSSOP |
| 标准包装： | 1,000 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 7 |
| 输出： | 可编程 |
| 电压 - 阀值： | 可调节/可选择 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADM1060EBZ-ND - BOARD EVALUATION ADM1060 |
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ADM1060
Table 44. Bit Map for OVSTAT Register 0xD9 (Power-On Default 0x00)
Bit
7
6
5
4
3
2
1
0
Name
Reserved
VP4OV
VP3OV
VP2OV
VP1OV
VHOV
VB2OV
VB1OV
R/W
N/A
R
R
R
R
R
R
R
Description
Cannot Be Used
If high, voltage on VP4 input is higher than the OV threshold.
If high, voltage on VP3 input is higher than the OV threshold.
If high, voltage on VP2 input is higher than the OV threshold.
If high, voltage on VP1 input is higher than the OV threshold.
If high, voltage on VH input is higher than the OV threshold.
If high, voltage on VB2 input is higher than the OV threshold.
If high, voltage on VB1 input is higher than the OV threshold.
Table 45. Bit Map for SFDSTAT Register 0xDA (Power-On Default 0x00)
Bit
7
6
5
4
3
2
1
0
Name
Reserved
VP4FLT
VP3FLT
VP2FLT
VP1FLT
VHFLT
VB2FLT
VB1FLT
R/W
N/A
R
R
R
R
R
R
R
Description
Cannot Be Used
If high, fault (UV, OV or Out-of-Window) has occurred on VP4 input.
If high, fault (UV, OV or Out-of-Window) has occurred on VP3 input.
If high, fault (UV, OV or Out-of-Window) has occurred on VP2 input.
If high, fault (UV, OV or Out-of-Window) has occurred on VP1 input.
If high, fault (UV, OV or Out-of-Window) has occurred on VH input.
If high, fault (UV, OV or Out-of-Window) has occurred on VB2 input.
If high, fault (UV, OV or Out-of-Window) has occurred on VB1 input.
Table 46. Bit Map for GWSTAT Register 0xDB (Power-On Default 0x00)
Bit
7?5
4
3
2
1
0
Name
Reserved
WDISTAT
GPI4STAT
GPI3STAT
GPI2STAT
GPI1STAT
R/W
N/A
R
R
R
R
R
Description
Cannot Be Used
If high, timeout has elapsed on the Watchdog Detector.
Logic level currently being driven on GPI4 input.
Logic level currently being driven on GPI3 input.
Logic level currently being driven on GPI2 input.
Logic level currently being driven on GPI1 input.
Table 47. Bit Map for PDOSTAT1 Register 0xDE (Power-On Default 0x00)
Bit
7
6
5
4
3
2
1
0
Name
PDO8STAT
PDO7STAT
PDO6STAT
PDO5STAT
PDO4STAT
PDO3STAT
PDO2STAT
PDO1STAT
R/W
R
R
R
R
R
R
R
R
Description
Logic level currently being driven on PDO8 output.
Logic level currently being driven on PDO7 output.
Logic level currently being driven on PDO6 output.
Logic level currently being driven on PDO5 output.
Logic level currently being driven on PDO4 output.
Logic level currently being driven on PDO3 output.
Logic level currently being driven on PDO2 output.
Logic level currently being driven on PDO1 output.
Table 48. Bit Map for PDOSTAT2 Register 0xDF (Power-On Default 0x00)
Bit
7–1
0
Name
Reserved
PDO9STAT
R/W
N/A
R
Description
Cannot Be Used
Logic level currently being driven on PDO9 output.
Rev. B | Page 37 of 52
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