参数资料
型号: ADM1186-1ARQZ-REEL
厂商: Analog Devices Inc
文件页数: 7/28页
文件大小: 0K
描述: IC SEQUENCER/MONITOR QUAD 20QSOP
标准包装: 2,500
类型: 序列发生器
监视电压数目: 4
输出: 开路漏极或开路集电极
复位: 高有效
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
供应商设备封装: 20-QSOP
包装: 带卷 (TR)

Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1186
GND
1
20
VCC
VIN1
2
19
OUT1
GND
1
16
VCC
VIN2 3
18
OUT2
VIN1 2
15
OUT1
VIN3
VIN4
UP
DOWN
FAULT
DLY_EN_OUT1
4
5
6
7
8
9
ADM1186-1
TOP VIEW
(Not to Scale)
17
16
15
14
13
12
OUT3
OUT4
PWRGD
SEQ_DONE
BLANK_DLY
DLY_EN_OUT4
VIN2 3
VIN3 4
VIN4 5
UP/DOWN 6
DLY_EN_OUT2
7
8
DLY_EN_OUT3
ADM1186-2
TOP VIEW
(Not to Scale)
14
13
12
11
10
9
OUT2
OUT3
OUT4
PWRGD
BLANK_DLY
DLY_EN_OUT4
DLY_EN_OUT2 10
11
DLY_EN_OUT3
Figure 3. ADM1186-1 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Figure 4. ADM1186-2 Pin Configuration
ADM1186-1
1
2
ADM1186-2
1
2
Mnemonic
GND
VIN1
Description
Chip Ground Pin.
Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V
reference. Can be used to monitor a voltage rail via a resistor divider. The output of this
comparator is monitored by the state machine.
3
3
VIN2
Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V
reference. Can be used to monitor a voltage rail via a resistor divider. The output of this
comparator is monitored by the state machine.
4
4
VIN3
Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V
reference. Can be used to monitor a voltage rail via a resistor divider. The output of this
comparator is monitored by the state machine.
5
5
VIN4
Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V
reference. Can be used to monitor a voltage rail via a resistor divider. The output of this
comparator is monitored by the state machine.
6
7
8
9
6
UP
DOWN
UP/DOWN
FAULT
DLY_EN_OUT1
Noninverting Comparator Input. A rising edge on this pin initiates a power-up sequence
when the ADM1186-1 is in the WAIT START state.
Noninverting Comparator Input. A falling edge on this pin initiates a power-down
sequence when the ADM1186-1 is in the POWER-UP DONE state.
Noninverting Comparator Input. A rising edge on this pin initiates a power-up sequence
when the ADM1186-2 is in the WAIT START state. A falling edge on this pin initiates a
power-down sequence when the ADM1186-2 is in the POWER-UP DONE state.
Active Low, Bidirectional, Open-Drain Pin. When an internal fault is detected by the
ADM1186-1 state machine, this pin is asserted low and the SET FAULT state is entered.
An external device pulling this pin low also causes the ADM1186-1 to enter the SET
FAULT state.
Timing Input. The capacitor connected to this input sets the time delay between the UP
input initiating a power-up sequence and OUT1 being asserted high. During a power-
down sequence, this input sets the time delay between OUT1 being asserted low and
SEQ_DONE being asserted low.
10
7
DLY_EN_OUT2
Timing Input. The capacitor connected to this input sets the time delay between VIN1
coming into compliance and OUT2 being asserted high during a power-up sequence.
During a power-down sequence, this input sets the time delay between OUT2 being
asserted low and OUT1 being asserted low.
11
8
DLY_EN_OUT3
Timing Input. The capacitor connected to this input sets the time delay between VIN2
coming into compliance and OUT3 being asserted high during a power-up sequence.
During a power-down sequence, this input sets the time delay between OUT3 being
asserted low and OUT2 being asserted low.
Rev. B | Page 7 of 28
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