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| 型号： | ADM660ARZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/11页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG ADJ 8SOIC |
| 标准包装： | 1,000 |
| 类型： | 升压（升压），切换电容（充电泵），倍增器，反相 |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | -1.5 V ~ -7 V，3 V ~ 14 V |
| 输入电压： | 1.5 V ~ 7 V |
| 频率 - 开关： | 25kHz，120kHz |
| 电流 - 输出： | 100mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-SO |
ADM660/ADM8660
Inverting Negative Voltage Generator
Figures 5 and 6 show the ADM660/ADM8660 configured to
Table II. ADM8660 Charge-Pump Frequency Selection
generate a negative output voltage. Input supply voltages from
1.5 V up to 7 V are allowable. For supply voltage less than 3 V,
LV must be connected to GND. This bypasses the internal
regulator circuitry and gives best performance in low voltage
applications. With supply voltages greater than 3 V, LV may
be either connected to GND or left open. Leaving it open facili-
FC
GND
V+
GND or V+
GND
OSC
Open
Open
Ext Cap
Ext CLK
Charge Pump
25 kHz
120 kHz
See Typical Characteristics
Ext CLK Frequency/2
C1, C2
10 μ F
2.2 μ F
tates direct substitution for the ICL7660.
+1.5V TO +7V
+1.5V TO +7V
INPUT
CLK OSC
C1 +
10 F
FC
CAP+
GND
ADM660
V+
OSC
LV
INPUT
INVERTED
C1
+
FC
CAP+
GND
CAP–
ADM660
ADM8660
V+
OSC
LV
OUT
CMOS GATE
INVERTED
NEGATIVE
CAP–
OUT
C2
NEGATIVE
OUTPUT
+
C2
OUTPUT
+ 10 F
Figure 5. ADM660 Voltage Inverter Configuration
+1.5V TO +7V
INPUT
Figure 7. ADM660/ADM8660 External Oscillator
Voltage Doubling Configuration
Figure 8 shows the ADM660 configured to generate increased
output voltages. As in the inverting mode, only two external
C1 +
10 F
SHUTDOWN
CONTROL
FC
CAP+
GND
CAP–
SD
ADM8660
V+
LV
OUT
C2
+ 10 F
INVERTED
NEGATIVE
OUTPUT
capacitors are required. The doubling function is achieved by
reversing some connections to the device. The input voltage is
applied to the GND pin and V+ is used as the output. Input
voltages from 2.5 V to 7 V are allowable. In this configuration,
pins LV, OUT must be connected to GND.
The unloaded output voltage in this configuration is 2 (V IN ).
Figure 6. ADM8660 Voltage Inverter Configuration
OSCILLATOR FREQUENCY
The internal charge-pump frequency may be selected to be
either 25 kHz or 120 kHz using the Frequency Control (FC)
input. With FC unconnected (ADM660) or connected to GND
Output resistance and ripple are similar to the voltage inverting
configuration.
Note that the ADM8660 cannot be used in the voltage
doubling configuration.
DOUBLED
(ADM8660), the internal charge pump runs at 25 kHz while, if
FC is connected to V+, the frequency is increased by a factor of
five. Increasing the frequency allows smaller capacitors to be
used for equivalent performance or, if the capacitor size is un-
+2.5V
TO +7V
INPUT
+
10 F
FC
CAP+
GND
CAP–
ADM660
V+
OSC
LV
OUT
10 F
POSITIVE
OUTPUT
changed, it results in lower output impedance and ripple.
If a charge-pump frequency other than the two fixed values is
desired, this is made possible by the OSC input, which can
either have a capacitor connected to it or be overdriven by an
external clock. Refer to the Typical Performance Characteris-
tics, which shows the variation in charge-pump frequency versus
capacitor size. The charge-pump frequency is one-half the oscil-
lator frequency applied to the OSC pin.
If an external clock is used to overdrive the oscillator, its levels
should swing to within 100 mV of V+ and GND. A CMOS
driver is, therefore, suitable. When OSC is overdriven, FC has
no effect but LV must be grounded.
Note that overdriving is permitted only in the voltage inverter
configuration.
Table I. ADM660 Charge-Pump Frequency Selection
Figure 8. Voltage Doubler Configuration
Shutdown Input
The ADM8660 contains a shutdown input that can be used to
disable the device and thus reduce the power consumption. A
logic high level on the SD input shuts the device down reducing
the quiescent current to 0.3 μ A. During shutdown, the output
voltage goes to 0 V. Therefore, ground referenced loads are not
powered during this state. When exiting shutdown, it takes
several cycles (approximately 500 μ s) for the charge pump to
reach its final value. If the shutdown function is not being used,
then SD should be hardwired to GND.
Capacitor Selection
The optimum capacitor value selection depends the charge-pump
frequency. With 25 kHz selected, 10 μ F capacitors are recommended,
while with 120 kHz selected, 2.2 μ F capacitors may be used.
FC
Open
V+
Open or V+
Open
OSC
Open
Open
Ext Cap
Ext CLK
Charge Pump
25 kHz
120 kHz
See Typical Characteristics
Ext CLK Frequency/2
C1, C2
10 μ F
2.2 μ F
Other frequencies allow other capacitor values to be used. For
maximum efficiency in all cases, it is recommended that capaci-
tors with low ESR are used for the charge-pump. Low ESR
capacitors give both the lowest output resistance and lowest
ripple voltage. High output resistance degrades the overall power
efficiency and causes voltage drops, especially at high output
–8 –
REV. C
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