参数资料
型号: ADM708TANZ
厂商: Analog Devices Inc
文件页数: 12/16页
文件大小: 0K
描述: IC SUPERVISOR MPU 3.08V WD 8DIP
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,推挽式
复位: 高有效/低有效
复位超时: 最小为 160 ms
电压 - 阀值: 3.08V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件

ADM706P/ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/ADM708T
APPLICATIONS INFORMATION
A typical operating circuit is shown in Figure 20. The unregulated
dc input supply is monitored using the PFI input via the resistive
divider network. Resistor R1 and Resistor R2 are to be selected
so that when the supply voltage drops below the desired level
(for example, 5 V), the voltage on PFI drops below the 1.25 V
threshold, thereby generating an interrupt to the microprocessor.
Monitoring the preregulator input gives additional time to
execute an orderly shutdown procedure before power is lost.
MONITORING ADDITIONAL SUPPLY LEVELS
It is possible to use the power-fail comparator to monitor a second
supply as shown in Figure 22. The two sensing resistors, R1 and
R2, are selected such that the voltage on PFI drops below 1.25 V at
the minimum acceptable input supply. The PFO output can be
connected to the MR input so that a reset is generated when
the supply drops out of tolerance. In this case, if either supply
drops out of tolerance, a reset is generated.
UNREGULATED
DC
ADM666A
V X
+3V/+3.3V
V CC
IN
GND
OUT
3.3V
V CC
RESET
V CC
RESET
R1
RESET
ADM706R/ WDI
ADM706S/
RESET
MICROPROCESSOR
ADM706R/
WDI
I/O LINE
PFI ADM706T
PFI
ADM706S/
ADM706T
WDO
MICROPROCESSOR
NMI
R2
MR
GND
PFO
MR
GND
PFO
INTERRUPT
GND
Figure 22. Monitoring 3 V/3.3 V and an Additional Supply, V X
MANUAL
RESET
Figure 20. Typical Application Circuit
Microprocessor activity is monitored using the WDI input. This
is driven using an output line from the processor. The software
routines toggle this line at least once every 1.6 seconds. If a problem
occurs and this line is not toggled, WDO goes low and a nonmask-
able interrupt is generated. This interrupt routine is to be used
MICROPROCESSORS WITH BIDIRECTIONAL RESET
To prevent contention for microprocessors with a bidirectional
reset line, a current limiting resistor is to be inserted between
the ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/
ADM708T RESET output pin and the microprocessor reset pin.
This limits the current to a safe level if there are conflicting output
reset levels. A suitable resistor value is 4.7 kΩ. If the reset output is
required for other uses, it should be buffered as shown in Figure 23 .
to clear the problem.
If, in the event of inactivity on the WDI line, a system reset is
required, the WDO output is to be connected to the input as
shown in Figure 21 .
+3V/+3.3V
V CC
ADM706R/ADM706S/
ADM706T/ADM708R/
ADM708S/ADM708T
BUFFERED
RESET
MICROPROCESSOR
RESET
ADM706R/
RESET
GND
RESET
RESET
GND
PFI
MR
ADM706S/ WDI
ADM706T
WDO
GND
I/O LINE
MICROPROCESSOR
Figure 23. Bidirectional Input/Output RESET
Figure 21. RESET from WDO
Rev. C | Page 12 of 16
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