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参数资料
| 型号： | ADMC328YN |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| 中文描述： | 28 - ROM的铅基于DSP的电机控制器的电流检测 |
| 文件页数： | 16/32页 |
| 文件大小： | 234K |
| 代理商： | ADMC328YN |
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ADMC328
–16–
REV. B
The second method for detecting a fault condition is through
the I
SENSE
pin in the analog block of the ADMC328. The I
SENSE
pin monitors the feedback signals from a dc bus current sensing
resistor that represents the total current in the motor. When the
voltage of I
SENSE
goes below I
SENSE
trip threshold,
PWMTRIP
will be internally pulled low. The negative edge of the internal
PWMTRIP
will generate a shutdown in the same manner as a
negative edge on pin
PWMTRIP
.
It is possible through software to initiate a PWM shutdown by
writing to the 1-bit read/write PWMSWT register (0x2061).
Writing to this bit generates a PWM shutdown in a manner
identical to the
PWMTRIP
or I
SENSE
pins. Following a PWM
shutdown, it is possible to determine if the shutdown was gener-
ated from hardware or software by reading the same PWMSWT
register. Reading this register also clears it.
Restarting the PWM after a fault condition is detected requires
clearing the fault and reinitializing the PWM. Clearing the fault
requires that
PWMTRIP
returns to a HI state and I
SENSE
returns
to a voltage greater than the I
SENSE
trip threshold. After the fault
has been cleared, the PWM can be restarted by writing to registers
PWMTM, PWMCHA, PWMCHB and PWMCHC. After the fault
is cleared and the PWM registers are initialized, internal timing
of the three-phase timing unit will resume, and the new duty cycle
values will be latched on the next rising edge of PWMSYNC.
PWM Registers
The configuration of the PWM registers is described at the end
of the data sheet. The parameters of the 16-bit PWM Timer is
tabulated in Table V.
ADC OVERVIEW
The ADC of the ADMC328 is based upon the single slope
conversion technique. This approach offers an inherently
monotonic conversion process and, to within the noise and sta-
bility of its components, there will be no missing codes.
Table VI. ADC Auxiliary Channel Selection
MODECTRL (1)
ADCMUX1
MODECTRL (0)
ADCMUX0
Select
VAUX0
VAUX1
VAUX2
Calibration (V
REF
)
0
0
1
1
0
1
0
1
The single slope technique has been adapted on the ADMC328
for four channels that are simultaneously converted. Refer to
Figure 11 for the functional schematic of the ADC. Two of the
main inputs (V1 and V2) are directly connected as high imped-
ance voltage inputs. The third main input channel (I
SENSE
) has a
special design to monitor the voltage on a current-sensing resis-
tor whose voltage is always below (more negative than) GND. The
fourth channel has been configured with a serially-connected
4-to-1 multiplexer. Table VI shows the multiplexer input selection
codes. One of these auxiliary multiplexed channels is used to cali-
brate the ramp against the internal voltage reference (V
REF
).
VAUX0
V2L
VAUXL
PWMSYNC (CONVST)
ADC
REGISTERS
V1L
V3L
V2
I
SENSE
(CAP RESET)
CLK MODECTRL<7>
12-BIT
ADC
TIMER
BLOCK
PWMTRIP
V
REF
COMP
ADC REGISTERS
ADC1
ADC2
ADC3
ADCAUX
MODECTRL<0..1>
EXTERNAL
CHARGING
CAP
V
C
ICONST
ICONST_TRIM<2:0>
VAUX1
VAUX2
COMP
COMP
COMP
V1
COMP
–5 X
0.8 X
C
GND
4 – 1
MUX
Figure 11. ADC Overview
Comparing each ADC input to a reference ramp voltage, and tim-
ing the comparison of the two signals, performs the conversion
process. The actual conversion point is the time point intersec-
tion of the input voltage and the ramp voltage (V
C
) as shown in
Figure 12. This time is converted to counts by the 12-bit ADC
Timer Block and is stored in the ADC registers. The ramp volt-
age used to perform the conversion is generated by driving a
fixed current into an off-chip capacitor, where the capacitor
voltage is
V
C
= (I/C)
×
t
Table V. Fundamental Characteristics of PWM Generation Unit of ADMC328
16-BIT PWM TIMER
Parameter
Min
Typ
Max
Unit
Counter Resolution
Edge Resolution (Single Update Mode)
Edge Resolution (Double Update Mode)
Programmable Dead Time Range
Programmable Dead Time Increments
Programmable Pulse Deletion Range
Programmable Pulse Deletion Increments
PWM Frequency Range
PWMSYNC Pulsewidth (T
CRST
)
Gate Drive Chop Frequency Range
16
100
50
Bits
ns
ns
μ
s
ns
μ
s
ns
Hz
μ
s
MHz
0
100
100
0
100
100
150
0.05
0.02
12.5
5
相关PDF资料 |
PDF描述 |
|---|---|
| ADMC328YR | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YR-XXX-YY | 30MM FLUSH BLACK PB SPRING RTRN |
| ADMC328TR-XXX-YY | 30MM FLUSH RED PB SPRING RTRN |
| ADMC328YN-XXX-YY | 30MM FLUSH CLEAR PB SPRING RTRN |
| ADMC328TN-XXX-YY | 30MM FLUSH YELLOW PUB SPRING RTRN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADMC328YN-XXX-YY | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YR | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YR-XXX-YY | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YRZGEP-27RL | 制造商:Analog Devices 功能描述: |
| ADMC330 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single Chip DSP Motor Controller |
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