参数资料
型号: ADP121-3.0-EVALZ
厂商: Analog Devices Inc
文件页数: 11/20页
文件大小: 0K
描述: BOARD EVAL FOR ADP121 3V
设计资源: Low power, Long Range, ISM Wireless Measuring Node (CN0164)
标准包装: 1
每 IC 通道数: 1 - 单
输出电压: 3V
电流 - 输出: 150mA
输入电压: 2.3 ~ 5.5 V
稳压器类型: 正,固定式
工作温度: -40°C ~ 125°C
板类型: 完全填充
已供物品:
已用 IC / 零件: ADP121
产品目录页面: 792 (CN2011-ZH PDF)
相关产品: ADP121-ACBZ30R7TR-ND - IC REG LDO 3V .15A 4WLCSP
ADP121-AUJZ30R7DKR-ND - IC REG LDO 3V .15A TSOT-23-5

Data Sheet
THEORY OF OPERATION
The ADP121 is a low quiescent current, low dropout linear
regulator that operates from 2.3 V to 5.5 V and provides up
to 150 mA of output current. Drawing a low 30 μA quiescent
current (typical) at full load makes the ADP121 ideal for battery-
operated portable equipment. Shutdown current consumption
is typically 100 nA.
Optimized for use with small 1 μF ceramic capacitors,
the ADP121 provides excellent transient performance.
ADP121
Internally, the ADP121 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is con-
trolled by the error amplifier. The error amplifier compares the
reference voltage with the feedback voltage from the output and
amplifies the difference. If the feedback voltage is lower than
the reference voltage, the gate of the PMOS device is pulled
lower, allowing more current to flow and increasing the output
voltage. If the feedback voltage is higher than the reference
VIN
GND
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
R1
VOUT
voltage, the gate of the PMOS device is pulled higher, allowing
less current to flow and decreasing the output voltage.
The ADP121 is available in output voltages ranging from 1.2 V to
3.3 V. The ADP121 uses the EN pin to enable and disable the
VOUT pin under normal operating conditions. When EN is
high, VOUT turns on; when EN is low, VOUT turns off. For
automatic startup, EN can be tied to VIN.
EN
SHUTDOWN
0.8V REFERENCE
R2
Figure 27. Internal Block Diagram
Rev. G | Page 11 of 20
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