参数资料
型号: ADP150AUJZ-2.5-R7
厂商: Analog Devices Inc
文件页数: 11/20页
文件大小: 0K
描述: IC REG LDO 2.5V .15A TSOT-5
设计资源: Broadband Low EVM Direct Conversion Transmitter (CN0134)
Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144)
Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147)
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 2.5V
输入电压: 最高 5.5V
电压 - 压降(标准): 0.105V @ 150mA
稳压器数量: 1
电流 - 输出: 150mA(最小值)
电流 - 限制(最小): 190mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: TSOT-23-5
包装: 标准包装
产品目录页面: 793 (CN2011-ZH PDF)
其它名称: ADP150AUJZ-2.5-R7DKR

Data Sheet
THEORY OF OPERATION
The ADP150 is an ultralow noise, low quiescent current, low
dropout linear regulator that operates from 2.2 V to 5.5 V and
can provide up to 150 mA of output current. Drawing a low 220 μA
of quiescent current (typical) at full load makes the ADP150 ideal
for battery-operated portable equipment. Shutdown current
consumption is typically 200 nA.
Using new innovative design techniques, the ADP150 provides
superior noise performance for noise sensitive analog and
RF applications without the need for a noise bypass capacitor.
The ADP150 is also optimized for use with small 1 μF ceramic
capacitors.
ADP150
Internally, the ADP150 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device that is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate of
the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The ADP150 is available in 14 output voltage options, ranging
VIN
GND
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
R1
VOUT
from 1.8 V to 3.3 V. The ADP150 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions. When
EN is high, VOUT turns on, and when EN is low, VOUT turns
off. For automatic startup, EN can be tied to VIN.
EN
SHUTDOWN
VOLTAGE
REFERENCE
R2
Figure 26. Internal Block Diagram
Rev. B | Page 11 of 20
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ADP150AUJZ-3.0-R7 制造商:Analog Devices 功能描述:IC, VOLTAGE REG, LDO, FIXED, 150mA, 3V,
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