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| 型号： | ADP150AUJZ-2.5-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 2.5V .15A TSOT-5 |
| 设计资源： | Broadband Low EVM Direct Conversion Transmitter (CN0134) Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144) Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147) |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 2.5V |
| 输入电压： | 最高 5.5V |
| 电压 - 压降（标准）： | 0.105V @ 150mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 150mA（最小值） |
| 电流 - 限制（最小）： | 190mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 供应商设备封装： | TSOT-23-5 |
| 包装： | 标准包装 |
| 产品目录页面： | 793 (CN2011-ZH PDF) |
| 其它名称： | ADP150AUJZ-2.5-R7DKR |
ADP150
Data Sheet
Parameter
POWER SUPPLY REJECTION RATIO
Symbol
PSRR
Conditions
10 kHz, V IN = 3.8 V, V OUT = 3.3 V, I OUT = 10 mA
Min
Typ
70
Max
Unit
dB
(V IN = V OUT + 0.5 V)
10 kHz, V IN = 2.3 V, V OUT = 1.8 V, I OUT = 10 mA
100 kHz, V IN = 3.8 V, V OUT = 3.3 V, I OUT = 10 mA
100 kHz, V IN = 2.3 V, V OUT = 1.8 V, I OUT = 10 mA
70
55
55
dB
dB
dB
POWER SUPPLY REJECTION RATIO
10 kHz, V IN = 4.3 V, V OUT = 3.3 V, I OUT = 10 mA
70
dB
(V IN = V OUT + 1 V)
100 kHz, V IN = 4.3 V, V OUT = 3.3 V, I OUT = 10 mA
55
dB
1
2
3
4
Based on an end-point calculation using 1 mA and 150 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
Start-up time is defined as the time between the rising edges of EN to V OUT being at 90% of its nominal value.
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT AND OUTPUT CAPACITOR
Minimum Input and Output Capacitance 1
C MIN
T A = ?40°C to +125°C
0.7
μF
Capacitor ESR
R ESR
T A = ?40°C to +125°C
0.001
0.2
?
1
The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R-type and X5R-type capacitors are
recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. B | Page 4 of 20
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