参数资料
| 型号： | ADP151ACPZ-1.8-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V .2A 6LFCSP |
| 标准包装： | 3,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V |
| 输入电压： | 2.2 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 200mA（最小值） |
| 电流 - 限制（最小）： | 220mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-UDFN 裸露焊盘，CSP |
| 供应商设备封装： | 6-LFCSP-UD（2x2） |
| 包装： | 带卷 (TR) |
Data Sheet
THEORY OF OPERATION
The ADP151 is an ultralow noise, low quiescent current, low
dropout linear regulator that operates from 2.2 V to 5.5 V and
can provide up to 200 mA of output current. Drawing a low
265 μA of quiescent current (typical) at full load makes the
ADP151 ideal for battery-operated portable equipment.
Shutdown current consumption is typically 200 nA.
Using new innovative design techniques, the ADP151 provides
superior noise performance for noise-sensitive analog and RF
applications without the need for a noise bypass capacitor. The
ADP151 is also optimized for use with small 1 μF ceramic
capacitors.
ADP151
Internally, the ADP151 consists of a reference, an error amplifier, a
feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate of
the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
An internal pull-down resistor on the EN input holds the input
VIN
GND
SHORT-CIRCUIT,
UVLO, AND
THERMAL
PROTECT
R1
VOUT
low when the pin is left open.
The ADP151 is available in 16 output voltage options, ranging
from 1.1 V to 3.3 V. The ADP151 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions. When
EN is high, VOUT turns on; when EN is low, VOUT turns off.
For automatic startup, EN can be tied to VIN.
EN
R EN
SHUTDOWN
REFERENCE
R2
Figure 27. Internal Block Diagram
Rev. E | Page 11 of 24
相关PDF资料 |
PDF描述 |
|---|---|
| FMC05DRES-S13 | CONN EDGECARD 10POS .100 EXTEND |
| ADP151ACPZ-1.5-R7 | IC REG LDO 1.5V .2A 6LFCSP |
| ADP151ACPZ-2.5-R7 | IC REG LDO 2.5V .2A 6LFCSP |
| EMC35DREN-S13 | CONN EDGECARD 70POS .100 EXTEND |
| EMC35DREH-S13 | CONN EDGECARD 70POS .100 EXTEND |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP151ACPZ-2.5-R7 | 功能描述:IC REG LDO 2.5V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-2.7-R7 | 功能描述:IC REG LDO 2.7V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-2.8-R7 | 制造商:Analog Devices 功能描述:ULTRALOW NOISE, 200 MA LOW DROPOUT LINEAR REGULATOR - Tape and Reel |
| ADP151ACPZ-3.0-R7 | 功能描述:IC REG LDO 3V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-3.3-R7 | 制造商:Analog Devices 功能描述:ULTRALOW NOISE, 200 MA,CMOS LINEAR REGULATOR - Tape and Reel |
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