参数资料
| 型号： | ADP151ACPZ-1.8-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/24页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V .2A 6LFCSP |
| 标准包装： | 3,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V |
| 输入电压： | 2.2 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 200mA（最小值） |
| 电流 - 限制（最小）： | 220mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-UDFN 裸露焊盘，CSP |
| 供应商设备封装： | 6-LFCSP-UD（2x2） |
| 包装： | 带卷 (TR) |
Data Sheet
ENABLE FEATURE
The ADP151 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 30,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
3.0
2.5
3.5
3.0
2.5
2.0
1.5
1.0
ADP151
ENABLE
2.0
0.5
0
3.3V
2.8V
1.1V
1.5
0
50
100
150
200
250
300
350
400
450
TIME (μs)
1.0
0.5
Figure 32. Typical Start-Up Behavior
ADJUSTABLE OUTPUT VOLTAGE OPERATION
The unique architecture of the ADP151 makes an adjustable
0
0
0.5
1.0
1.5
2.0
2.5
version difficult to implement in silicon. However, it is possible
to create an adjustable regulator at the expense of increasing the
ENABLE VOLTAGE
Figure 30. ADP151 Typical EN Pin Operation
As shown in Figure 30, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 31 shows typical EN active/inactive thresholds
quiescent current of the regulator circuit.
The ADP151, and similar LDOs, are designed to regulate the
output voltage, V OUT , appearing at the VOUT pin with respect
to the GND pin. If the GND pin is at a potential other than 0 V
(for example, at V OFFSET ), the ADP151 output voltage is V OUT +
V OFFSET . By taking advantage of this behavior, it is possible to
create an adjustable ADP151 circuit that retains most of the
desirable characteristics of the ADP151.
when the input voltage varies from 2.2 V to 5.5 V.
1200
V IN
C1
1
VIN
VOUT 5
U1
V OUT
C2
2
GND
1000
3
EN
NC 4
800
V EN RISE
V OFFSET
R2
C3
R1
600
400
200
V EN FALL
V OUT = V LDO × (1 + R2/R1)
Figure 33. Adjustable LDO Using the ADP151
The circuit shown in Figure 33 is an example of an adjustable
LDO using the ADP151. A stable V OFFSET voltage is created by
passing a known current through R2. The current through R2 is
determined by the voltage across R1. Because the voltage across
0
2.0
2.5
3.0
3.5 4.0
INPUT VOLTAGE
4.5
5.0
5.5
R1 is set by the voltage between VOUT and GND, the current
passing through R2 is fixed, and V OFFSET is stable.
Figure 31. Typical EN Pin Thresholds vs. Input Voltage
The ADP151 uses an internal soft start to limit the inrush current
when the output is enabled. The start-up time for the 3.3 V
option is approximately 160 μs from the time the EN active
threshold is crossed to when the output reaches 90% of its final
value. As shown in Figure 32, the start-up time is dependent on
the output voltage setting.
To minimize the effect variation of the ADP151 ground current
(I GND ) with load, it is best to keep R1 as small as possible. It is
also best to size the current passing through R2 to at least 20×
greater than the maximum expected ground current.
To create a 4 V LDO circuit, start with the 3.3 V version of the
ADP151 to minimize the value of R2. Because V OUT is 4 V,
V OFFSET must be 0.7 V, and the current through R2 must be 7 mA.
R1 is, therefore, 3.3 V/7 mA or 471 Ω. A 470 Ω standard value
introduces less than 1% error. Capacitor C3 is necessary to stabilize
the LDO; a value of 1 μF is adequate.
Rev. E | Page 13 of 24
相关PDF资料 |
PDF描述 |
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| FMC05DRES-S13 | CONN EDGECARD 10POS .100 EXTEND |
| ADP151ACPZ-1.5-R7 | IC REG LDO 1.5V .2A 6LFCSP |
| ADP151ACPZ-2.5-R7 | IC REG LDO 2.5V .2A 6LFCSP |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP151ACPZ-2.5-R7 | 功能描述:IC REG LDO 2.5V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-2.7-R7 | 功能描述:IC REG LDO 2.7V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-2.8-R7 | 制造商:Analog Devices 功能描述:ULTRALOW NOISE, 200 MA LOW DROPOUT LINEAR REGULATOR - Tape and Reel |
| ADP151ACPZ-3.0-R7 | 功能描述:IC REG LDO 3V .2A 6LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ADP151ACPZ-3.3-R7 | 制造商:Analog Devices 功能描述:ULTRALOW NOISE, 200 MA,CMOS LINEAR REGULATOR - Tape and Reel |
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