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参数资料
| 型号： | ADP1614ACPZ-1.3-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BOOST ADJ 4A 10LFCSP |
| 标准包装： | 1,500 |
| 类型： | 升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 2.5 V ~ 20 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.3MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 10-LFCSP-WD（3x3） |
| 其它名称： | ADP1614ACPZ-1.3-R7-ND ADP1614ACPZ-1.3-R7TR |
Data Sheet
CURRENT-MODE PWM OPERATION
The ADP1614 utilizes a current-mode PWM control scheme to
regulate the output voltage over all load conditions. The output
voltage is monitored at FB through a resistive voltage divider. The
voltage at FB is compared with the internal 1.245 V reference by
the internal transconductance error amplifier to create an error
voltage at COMP. The current of the switch is internally measured
and added to the stabilizing ramp. The resulting sum is compared
with the error voltage at COMP to control the PWM modulator.
This current-mode regulation system allows fast transient response
while maintaining a stable output voltage. By selecting the proper
resistor-capacitor network from COMP to GND, the regulator
response is optimized for a wide range of input voltages, output
voltages, and load conditions.
ADJUSTABLE CURRENT LIMIT
A key feature of the ADP1614ACPZ-650-R7 and
ADP1614ACPZ-1.3-R7 is a pin-adjustable peak current limit
of up to 4 A (see Figure 10 to Figure 13 and Figure 33). This
adjustable current limit allows the other external components to
be selected specifically for the application. The current limit is set
via an external resistor connected from Pin 9 (CLRES) to ground.
For the ADP1614ACPZ-R7, the current limit is fixed at 3 A.
4.0
V IN = 3.5V
3.5
ADP1614
SOFT START
To prevent input inrush current to the converter when the part
is enabled, connect a capacitor from SS to GND to set the soft
start period. After the ADP1614 is turned on, SS sources 5 μA
(typical) to the soft start capacitor (C SS ) until it reaches 1.23 V
at startup. As the soft start capacitor charges, it limits the peak
current allowed by the part. By slowly charging the soft start
capacitor, the input current ramps slowly to prevent it from
overshooting excessively at startup. When the ADP1614 is
disabled, the SS pin is internally shorted to GND to discharge
the soft start capacitor.
THERMAL SHUTDOWN (TSD)
The ADP1614 includes TSD protection. If the die temperature
exceeds 150°C (typical), TSD turns off the NMOS power device,
significantly reducing power dissipation in the device and
preventing output voltage regulation. The NMOS power device
remains off until the die temperature is reduced to 130°C (typical).
The soft start capacitor is discharged during TSD to ensure low
output voltage overshoot and inrush currents when regulation
resumes.
UNDERVOLTAGE LOCKOUT (UVLO)
If the input voltage is below the UVLO threshold, the ADP1614
automatically turns off the power switch and places the part
into a low power consumption mode. This prevents potentially
erratic operation at low input voltages and prevents the power
3.0
2.5
V OUT = 5V
device from turning on when the control circuitry cannot
operate it. The UVLO levels have ~100 mV of hysteresis to
ensure glitch-free startup.
2.0
1.5
1.0
V OUT = 15V
SHUTDOWN MODE
The EN pin turns the ADP1614 regulator on or off. Drive EN
low to shut down the regulator and reduce the input current to
0.25 μA (typical). Drive EN high to turn on the regulator.
When the converter is in shutdown mode (EN ≤ 0.3 V), there is a
60
75 90 105 120 135
R CL (k?)
Figure 33. Peak Current Limit of Switch vs. R CL
150
dc path from the input to the output through the inductor and
output rectifier. This causes the output voltage to remain slightly
below the input voltage by the forward voltage of the rectifier,
FREQUENCY SELECTION
The adjustable current-limit versions of the ADP1614 are
internally programmed to operate at either 650 kHz or
1.3 MHz. Operation of the ADP1614 at 650 kHz
(ADP1614ACPZ-650-R7) optimizes the efficiency of
the device, whereas operation of the ADP1614 at 1.3 MHz
(ADP1614ACPZ-1.3-R7) enables the device to be used with
smaller external components. For the fixed current-limit
preventing the output voltage from dropping to ground when the
regulator is shut down.
Regardless of the state of the EN pin, when a voltage is applied to
the VIN pin, a large current spike occurs due to the nonisolated
path through the inductor and diode between V IN and V OUT . The
high current is a result of the output capacitor charging. The
peak value is dependent on the inductor, output capacitor, and
any load active on the output of the regulator.
version (ADP1614ACP-R7), the frequency is pin selectable
via the FREQ Pin (Pin 9). Connect FREQ to GND for 650 kHz
operation or connect FREQ to VIN for 1.3 MHz operation. Do
not leave the FREQ pin floating.
Rev. A | Page 13 of 20
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