参数资料
型号: ADP1713AUJZ-0.9-R7
厂商: Analog Devices Inc
文件页数: 4/16页
文件大小: 0K
描述: IC REG LDO 0.9V .3A TSOT-23-5
产品培训模块: Power Line Monitoring
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 0.9V
输入电压: 2.5 V ~ 5.5 V
稳压器数量: 1
电流 - 输出: 300mA(最小值)
电流 - 限制(最小): 380mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: TSOT-23-5
包装: 标准包装
其它名称: ADP1713AUJZ-0.9-R7DKR
ADP1712/ADP1713/ADP1714
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
EN INPUT LOGIC HIGH
EN INPUT LOGIC LOW
V IH
V IL
2.5 V ≤ V IN ≤ 5.5 V
2.5 V ≤ V IN ≤ 5.5 V
1.8
0.4
V
V
EN INPUT LEAKAGE CURRENT
ADJ INPUT BIAS CURRENT
V I-LEAKAGE
ADJ I-BIAS
EN = IN or GND
0.1
30
1
100
μA
nA
(ADP1712 ADJUSTABLE)
OUTPUT NOISE
OUT NOISE
ADP1713
10 Hz to 100 kHz, V IN = 5.0 V, V OUT = 0.75 V,
40
μV rms
with 10 nF bypass capacitor
ADP1712 and ADP1714
POWER SUPPLY REJECTION RATIO
ADP1713
PSRR
10 Hz to 100 kHz, V IN = 5.0 V, V OUT = 3.3 V
1 kHz, V IN = 5.0 V, V OUT = 0.75 V, with 10 nF
380
72
μV rms
dB
bypass capacitor
ADP1712 and ADP1714
1 kHz, V IN = 5.0 V, V OUT = 3.3 V
65
dB
1
2
3
4
5
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
Based on an end-point calculation using 10 mA and 300 mA loads. See Figure 10 for typical load regulation performance for loads less than 10 mA.
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
Rev. A | Page 4 of 16
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