参数资料
型号: ADP1879-0.3-EVALZ
厂商: Analog Devices Inc
文件页数: 4/40页
文件大小: 0K
描述: BOARD EVAL FOR ADP1879-0.3
标准包装: 1
系列: *
ADP1878/ADP1879
Data Sheet
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
ADP1878ACPZ-0.6-R7/
ADP1879ACPZ-0.6-R7
600
kHz
On Time
Minimum On Time
Minimum Off Time
V IN = 5 V, V OUT = 2 V, T J = 25°C
V IN = 20 V, V OUT = 0.8 V
65% duty cycle (maximum)
500
540
82
340
605
110
400
ns
ns
ns
ADP1878ACPZ-1.0-R7/
ADP1879ACPZ-1.0-R7
1.0
MHz
On Time
Minimum On Time
Minimum Off Time
V IN = 5 V, V OUT = 2 V, T J = 25°C
V IN = 20 V
45% duty cycle (maximum)
285
312
52
340
360
85
400
ns
ns
ns
OUTPUT DRIVER CHARACTERISTICS
High-Side Driver
Output Source Resistance
Output Sink Resistance
I SOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V)
I SINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V)
2.20
0.72
3
1
Ω
Ω
Rise Time 2
Fall Time 2
t r, DRVH
t f, DRVH
BST ? SW = 4.4 V, C IN = 4.3 nF (see Figure 59)
BST ? SW = 4.4 V, C IN = 4.3 nF (see Figure 60)
25
11
ns
ns
Low-Side Driver
Output Source Resistance
Output Sink Resistance
I SOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V)
I SINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V)
1.5
0.7
2.2
1
Ω
Ω
Rise Time 2
Fall Time 2
t r,DRVL
t f,DRVL
V REG = 5.0 V, C IN = 4.3 nF (see Figure 60)
V REG = 5.0 V, C IN = 4.3 nF (see Figure 59)
18
16
ns
ns
Propagation Delays
DRVL Fall to DRVH Rise 2
DRVH Fall to DRVL Rise 2
SW Leakage Current
t tpdhDRVH
t tpdhDRVL
I SWLEAK
BST ? SW = 4.4 V (see Figure 59)
BST ? SW = 4.4 V (see Figure 60)
BST = 25 V, SW = 20 V, V REG = 5 V
15.7
16
110
ns
ns
μA
Integrated Rectifier
Channel Impedance
I SINK = 10 mA
22.3
Ω
PRECISION ENABLE THRESHOLD
Logic High Level
Enable Hysteresis
V IN = 2.9 V to 20 V, V REG = 2.75 V to 5.5 V
V IN = 2.9 V to 20 V, V REG = 2.75 V to 5.5 V
605
634
31
663
mV
mV
COMP VOLTAGE
COMP Clamp Low Voltage
COMP Clamp High Voltage
COMP Zero Current Threshold
V COMP(LOW)
V COMP(HIGH)
V COMP_ZCT
Tie EN pin to VREG to enable device
(2.75 V ≤ V REG ≤ 5.5 V)
(2.75 V ≤ V REG ≤ 5.5 V)
(2.75 V ≤ V REG ≤ 5.5 V)
0.47
1.10
2.55
V
V
V
THERMAL SHUTDOWN
T TMSD
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Rising temperature
155
15
°C
°C
CURRENT LIMIT
Hiccup Current-Limit Timing
OVERVOLTAGE AND POWER-
PGOOD
COMP = 2.4 V
6
ms
GOOD THRESHOLDS
FB Power-Good Threshold
FB Power-Good Hysteresis
FB Overvoltage Threshold
FB Overvoltage Hysteresis
PGOOD Low Voltage During Sink
PGOOD Leakage Current
FB PGD
FB OV
V PGOOD
V FB rising during system power up
V FB rising during overvoltage event, I PGOOD = 1 mA
I PGOOD = 1 mA
PGOOD = 5 V
542
34
691
35
143
1
566
55
710
55
200
100
mV
mV
mV
mV
mV
nA
1
2
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure 59 and Figure 60), C GATE = 4.3 nF, and the high- and low-side
MOSFETs being Infineon BSC042N03MS G.
Not automatic test equipment (ATE) tested.
Rev. B | Page 4 of 40
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