参数资料
型号: ADP2107ACPZ-R7
厂商: Analog Devices Inc
文件页数: 15/36页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 16LFCSP
产品培训模块: Powering 90nm/65nm FPGAs and Processors
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5.5 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1.2MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘,CSP
包装: 标准包装
供应商设备封装: 16-LFCSP-VQ
产品目录页面: 791 (CN2011-ZH PDF)
配用: ADP2107-EVALZ-ND - BOARD EVALUATION FOR ADP2107
ADP2107-1.8-EVALZ-ND - BOARD EVAL FOR ADP2107-1.8
其它名称: ADP2107ACPZ-R7DKR
Data Sheet
SLOPE COMPENSATION
Slope compensation stabilizes the internal current control loop
of the ADP2105/ADP2106/ADP2107 when operating beyond
50% duty cycle to prevent subharmonic oscillations. It is imple-
mented by summing a fixed, scaled voltage ramp to the current
sense signal during the on-time of the P-channel MOSFET switch.
The slope compensation ramp value determines the minimum
inductor that can be used to prevent subharmonic oscillations
at a given output voltage. For slope compensation ramp values,
see Table 5. For more information see the Inductor Selection
section.
Table 5. Slope Compensation Ramp Values
Part Slope Compensation Ramp Values
ADP2105 0.72 A/μs
ADP2106 1.07 A/μs
ADP2107 1.38 A/μs
DESIGN FEATURES
Enable/Shutdown
Drive EN high to turn on the ADP2105/ADP2106/ADP2107.
Drive EN low to turn off the ADP2105/ADP2106/ADP2107,
reducing the input current below 0.1 μ A. To force the
ADP2105/ADP2106/ADP2107 to automatically start when
input power is applied, connect EN to IN. When shut down, the
ADP2105/ADP2106/ADP2107 discharge the soft start capacitor,
causing a new soft start cycle every time they are re-enabled.
Synchronous Rectification
In addition to the P-channel MOSFET switch, the ADP2105/
ADP2106/ADP2107 include an integrated N-channel MOSFET
synchronous rectifier. The synchronous rectifier improves effi-
ciency, especially at low output voltage, and reduces cost and
board space by eliminating the need for an external rectifier.
Current Limit
The ADP2105/ADP2106/ADP2107 have protection circuitry to
limit the direction and amount of current flowing through the
power switch and synchronous rectifier. The positive current
ADP2105/ADP2106/ADP2107
Short-Circuit Protection
The ADP2105/ADP2106/ADP2107 include frequency foldback
to prevent output current runaway on a hard short. When the
voltage at the feedback pin falls below 0.3 V, indicating the possi-
bility of a hard short at the output, the switching frequency is
reduced to 1/4 of the internal oscillator frequency. The reduction
in the switching frequency results in more time for the inductor to
discharge, preventing a runaway of output current.
Undervoltage Lockout (UVLO)
To protect against deep battery discharge, UVLO circuitry is
integrated on the ADP2105/ADP2106/ADP2107. If the
input voltage drops below the 2.2 V UVLO threshold, the
ADP2105/ADP2106/ADP2107 shut down, and both the power
switch and synchronous rectifier turn off. When the voltage
again rises above the UVLO threshold, the soft start period is
initiated, and the part is enabled.
Thermal Protection
In the event that the ADP2105/ADP2106/ADP2107 junction
temperatures rise above 140 ° C, the thermal shutdown circuit turns
off the converter. Extreme junction temperatures can be the
result of high current operation, poor circuit board design, and/or
high ambient temperature. A 40 ° C hysteresis is included so that
when thermal shutdown occurs, the ADP2105/ADP2106/
ADP2107 do not return to operation until the on-chip tempera-
ture drops below 100 ° C. When coming out of thermal shutdown,
soft start is initiated.
Soft Start
The ADP2105/ADP2106/ADP2107 include soft start circuitry
to limit the output voltage rise time to reduce inrush current at
startup. To set the soft start period, connect the soft start capacitor
(C SS ) from SS to AGND. When the ADP2105/ADP2106/ADP2107
are disabled, or if the input voltage is below the undervoltage
lockout threshold, C SS is internally discharged. When the
ADP2105/ADP2106/ADP2107 are enabled, C SS is charged through
an internal 0.8 μA current source, causing the voltage at SS to rise
linearly. The output voltage rises linearly with the voltage at SS.
limit on the power switch limits the amount of current that can
flow from the input to the output, and the negative current limit
on the synchronous rectifier prevents the inductor current from
reversing direction and flowing out of the load.
Rev. D | Page 15 of 36
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