参数资料
型号: ADP2116-BL2-EVZ
厂商: Analog Devices Inc
文件页数: 3/36页
文件大小: 0K
描述: EVAL BOARD FOR ADP2116
标准包装: 1
主要目的: DC/DC,步降
稳压器拓扑结构: 降压
板类型: 裸(未填充)
已供物品: 裸板
已用 IC / 零件: ADP2116

Data Sheet
ADP2116
SPECIFICATIONS
If unspecified, VDD = VINx = EN1 = EN2 = 5.0 V. The minimum and maximum specifications are valid for T J = ?40°C to +125°C, unless
otherwise specified. Typical values are at T J = 25°C. All limits at temperature extremes are guaranteed via correlation using standard
statistical quality control (SQC).
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
POWER SUPPLY
VDD Bias Voltage
V DD
2.75
5.5
V
Undervoltage Lockout Threshold
UVLO
V DD rising
2.65
2.75
V
V DD falling
2.35
2.47
Undervoltage Lockout Hysteresis
0.18
V
Quiescent Current
I DD,CH1
EN1 = VDD = 5 V, EN2 = GND, V FB1 = VDD,
1.7
2.5
mA
OPCFG = GND
I DD,CH2
EN2 = VDD = 5 V, EN1 = GND, V FB2 = VDD,
1.7
2.5
mA
OPCFG = GND
I DD,CH1 + CH2
EN1 = EN2 = VDD = 5 V, V FB2 = V FB1 = VDD,
3.0
4.0
mA
OPCFG = GND
Shutdown Current
I DD,SD
EN1 = EN2 = GND, VDD = VINx = 2.75 V to 5.5 V,
1.0
10
μA
T J = ?40°C to +115°C
ERROR INTEGRATOR (OPERATIONAL
TRANSCONDUCTANCE AMPLIFIER)
FB1, FB2 Input Bias Current
I FB
Adjustable output, V FBx = 0.6 V,
1
65
nA
V1SET, V2SET = VDD or via 82 kΩ to GND
Fixed output, V FBx = 1.2 V,
11
15
μA
V1SET, V2SET via 4.7 kΩ to GND
Transconductance
g m
550
μA/V
COMPx VOLTAGE RANGE
COMPx Zero-Current Threshold
V COMP, ZCT
Guaranteed by design
1.12
V
COMPx Clamp High Voltage
V COMP, HI
VDD = VINx = 2.75 V to 5.5 V
2.36
2.45
V
COMPx Clamp Low Voltage
V COMP, LO
VDD = VINx = 2.75 V to 5.5 V
0.65
0.70
V
OUTPUT CHARACTERISTICS
Output Voltage Accuracy
V FB
Adjustable output, T J = 25°C,
0.597
0.600
0.603
V
V1SET, V2SET = VDD or via 82 kΩ to GND
Adjustable output, T J = ?40°C to +125°C,
0.594
0.600
0.606
V
V1SET, V2SET = VDD or via 82 kΩ to GND
V FB ERROR
Fixed output, T J = 25°C, V1SET, V2SET = GND
or via 4.7 kΩ, 8.2 kΩ, 15 kΩ, 27 kΩ,
?1.0
+1.0
%
47 kΩ to GND
Fixed output, T J = ?40°C to +125°C,
V1SET, V2SET = GND or via 4.7 kΩ, 8.2 kΩ,
?1.5
+1.5
%
15 kΩ, 27 kΩ, 47 kΩ to GND
Line Regulation
Load Regulation
OSCILLATOR
VDD = VINx = 2.75 V to 5.5 V
VDD = VINx = 2.75 V to 5.5 V
All oscillator parameters provided for
0.05
0.03
%/V
%/A
VDD = 2.75 V to 5.5 V
Switching Frequency
f SW
FREQ tied to GND
FREQ via 8.2 kΩ to GND
FREQ via 27 kΩ to GND
255
510
1020
300
600
1200
345
690
1380
kHz
kHz
kHz
SYNC Frequency Range
f SYNC
f SYNC = 2 × f SW
SYNC Input Pulse Width
FREQ tied to GND
FREQ via 8.2 kΩ to GND
FREQ via 27 kΩ to GND
400
800
1600
100
1000
2000
4000
kHz
kHz
kHz
ns
Rev. A | Page 3 of 36
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