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| 型号： | ADP2323-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 24/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL ADP2323 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.2V，3.3V |
| 电流 - 输出： | 3A，3A |
| 输入电压： | 4.5 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 250kHz ~ 1.2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP2323 |
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ADP2323
For the 1.2 V rail, the output capacitor ESR needs to be smaller
than 12 m?, and the output capacitance needs to be larger than
Data Sheet
For the 3.3 V rail, the 47μF ceramic output capacitor has a
derated value of 32 μF.
= 73 . 7 kΩ
191 μF. It is recommend that three pieces of 100 μF/X5R/6.3 V
ceramic capacitor be used, such as the GRM32ER60J107ME20
from Murata, with an ESR = 2 m?.
For the 3.3 V rail, the ESR of the output capacitor must be
smaller than 32 m? and the output capacitance must be larger
R C2 =
C C 2 =
2 × π × 3 . 3 V × 2 × 32 μF × 50 kHz
0 . 6 V × 300 μs × 5 A/V
( 1 . 1 Ω + 0 . 001 Ω ) × 2 × 32 μF = 956 pF
73 . 7 kΩ
than 54 μF. It is recommended that two pieces of 47 μF/X5R/6.3
V ceramic capacitor be used, such as the Murata
GRM32ER60J476ME20, with an ESR = 2 m?.
C CP2 =
0 . 001 Ω × 2 × 32 μF
73 . 7 kΩ
= 1 pF
LOW-SIDE MOSFET SELECTION
A low R DSON N-channel MOSFET is selected for high efficiency
solutions. The MOSFET breakdown voltage needs to be greater
than 1.2 V × V IN , and the drain current needs to be greater than
1.2 V × I LIMIT .
Choose standard component values of R C2 = 75 k? and
C C2 = 1000 pF. No C CP2 is needed.
frequency is 59 kHz and phase margin is 61°.
60 180
It is recommended that a 30 V, N-channel MOSFET be used, such as
the FDS8880 from Fairchild. The R DSON of the FDS8880 at a 4.5 V
driver voltage is 12 m?, and the total gate charge is 12 nC.
COMPENSATION COMPONENTS
For better load transient and stability performance, set the cross
frequency, f C , to f SW /10. In this case, f SW is running at 500 kHz;
therefore, the f C is set to 50 kHz.
For the 1.2 V rail, the 100 μF ceramic output capacitor has
a derated value of 64 μF.
48
36
24
12
0
–12
–24
–36
–48
144
108
72
36
0
–36
–72
–108
–144
R C1 =
= 80 . 4 kΩ
C CP1 =
0 . 001 Ω × 3 × 64 μF
C SS =
I SS × T SS 3 . 5 μA × 3 ms
2 × π × 1 . 2 V × 3 × 64 μF × 50 kHz
0 . 6 V × 300 μs × 5 A/V
C C 1 = ( 0 . 4 Ω + 0 . 001 Ω ) × 3 × 64 μF = 957 pF
80 . 4 kΩ
= 2 . 4 pF
80 . 4 kΩ
Choose standard components, R C1 = 82 k? and C C1 = 1000 pF. No
C CP1 is needed.
frequency is 49 kHz and the phase margin is 59°.
–60 –180
1k 10k 100k 1M
FREQUENCY (Hz)
Figure 49. Bode Plot for 3.3 V Rail
SOFT START TIME PROGRAMMING
The soft start feature allows the output voltage to ramp up in a
controlled manner, eliminating output voltage overshoot during
soft start and limiting inrush current. The soft start time is set
to 3 ms.
= = 17 . 5 nF
0 . 6 V 0 . 6 V
Choose a standard component value of C SS1 = C SS2 = 22 nF.
60
48
36
24
12
0
–12
–24
–36
–48
–60
180
144
108
72
36
0
–36
–72
–108
–144
–180
INPUT CAPACITOR SELECTION
A minimum 10 μF ceramic capacitor is required, placed near
the PVINx pin. In this application, one piece of 10 μF, X5R, 25
V ceramic capacitor is recommended.
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 48. Bode Plot for 1.2 V Rail
Rev. A | Page 24 of 32
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