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参数资料
| 型号： | ADP3050-EVAL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADP3050 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输入电压： | 3.6 ~ 30 V |
| 稳压器拓扑结构： | 降压 |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP3050 |
| 相关产品： | ADP3050ARZ-3.3-RL7TR-ND - IC REG BUCK 3.3V 1A 8SOIC ADP3050ARZ-3.3-RLTR-ND - IC REG BUCK 3.3V 1A 8SOIC ADP3050ARZ-3.3-ND - IC REG BUCK 3.3V 1A 8SOIC ADP3050ARZ-R7DKR-ND - IC REG BUCK ADJ 1A 8SOIC ADP3050ARZ-R7CT-ND - IC REG BUCK ADJ 1A 8SOIC ADP3050ARZ-R7TR-ND - IC REG BUCK ADJ 1A 8SOIC ADP3050ARZ-5-ND - IC REG BUCK 5V 1A 8SOIC ADP3050ARZ-RLTR-ND - IC REG BUCK ADJ 1A 8SOIC ADP3050ARZ-5-REEL7TR-ND - IC REG BUCK 5V 1A 8SOIC ADP3050ARZ-5-REELTR-ND - IC REG BUCK 5V 1A 8SOIC 更多... |
Data Sheet
BOARD LAYOUT GUIDELINES
A good board layout is essential when designing a switching
regulator. The high switching currents along with parasitic
ADP3050
wiring inductances can generate significant voltage transients
OUTPUT
GROUND
INPUT
and cause havoc in sensitive circuits. For best results, keep the
main switching path as tight as possible (keep L1, D1, C IN , and
C OUT close together) and minimize the copper area of the SWITCH
and BOOST nodes (without violating current density require-
ments) to reduce the amount of noise coupling into other
sensitive nodes.
C1
L1
L1
C3
V IN
IN
SWITCH
V OUT
C IN
ADP3050
GND
D1
C OUT
D2
C2
D1
GND
GND
Figure 26. Main Switching Path
R2
R1
CC
RC
The external components should be located as close to the
ADP3050 as possible. For best thermal performance, use wide
copper traces for all IC connections, and always connect the
GND pin to a large piece of copper or ground plane. The additional
ADP3050
Figure 27. Recommended Board Layout
L1
copper improves heat transfer from the IC, greatly reducing the
package thermal resistance. Further improvements of the thermal
performance can be made by using multilayer boards and using
vias to transfer heat to the other layers. A single layer board
layout is shown in Figure 27. The amount of copper used for the
D1
1N5817
22μH
D2
1N4148
C3
0.22μF
1 SWITCH
2 BOOST
IN 8
GND 7
3.3V
V OUT
+ C5
100μF
input, output, and ground traces can be reduced, but were made
large to improve the thermal performance. For the 5 V and 3.3 V
3 BIAS
SD 6
versions, leave out R1 and R2; for the adjustable version, remove
the trace that shorts out R2. Route all sensitive traces and compo-
nents, such as those associated with feedback and compensation,
away from the BOOST and SWITCH traces.
SD
4 FB COMP 5
U1
ADP3050-3.3
R1
7.5k?
C4
1nF
TYPICAL APPLICATIONS
5 V to 3.3 V Buck (Step-Down) Regulator
The circuit in Figure 28 shows the ADP3050 in a buck
V IN
GND
5V
+ C1
22μF
C2
0.01μF
configuration. It is used to generate 3.3 V regulated output from
5 V input voltage with the following specifications:
V IN = 4.5 V to 5.5 V
V OUT = 3.3 V
I OUT = 0.75 A
I RIPPLE = 0.4 A × 0.75 A = 0.3 A
V OUT_RIPPLE = 50 mV
Rev. C | Page 17 of 20
Figure 28. 5 V to 3.3 V Buck Regulator
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP3050-EVALZ | 制造商:AD 制造商全称:Analog Devices 功能描述:200 kHz, 1 A High Voltage Step-Down Switching Regulator |
| ADP3051 | 制造商:AD 制造商全称:Analog Devices 功能描述:500 mA PWM Step-Down DC-DC with Synchronous Rectifier |
| ADP3051ARMZ-REEL | 制造商:Analog Devices 功能描述:CONV DC-DC SGL-OUT STEP DOWN 8MSOP - Tape and Reel |
| ADP3051ARMZ-REEL7 | 制造商:Analog Devices 功能描述:Conv DC-DC Single Step Down 2.7V to 5.5V 8-Pin MSOP T/R 制造商:Analog Devices 功能描述:SWITCH REG SYNC BUCK 500MA 8MSOP |
| ADP3088 | 制造商:AD 制造商全称:Analog Devices 功能描述:1 MHz, 750 mA Buck Regulator |
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