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| 型号： | ADP3629ARZ-R7 |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | MOSFETs |
| 英文描述： | High Speed, Dual, 2 A MOSFET Driver, inverting A/B input pins; Package: 8 ld SOIC; No of Pins: 8; Temperature Range: Ind |
| 中文描述： | 2 A 2 CHANNEL, BUF OR INV BASED MOSFET DRIVER, PDSO8 |
| 封装： | ROHS COMPLIANT, MS-012-AA, SOIC-8 |
| 文件页数： | 5/16页 |
| 文件大小： | 361K |
| 代理商： | ADP3629ARZ-R7 |
ADP3629/ADP3630/ADP3631
Rev. 0 | Page 13 of 16
THERMAL CONSIDERATIONS
When designing a power MOSFET gate drive, the maximum
power dissipation in the driver must be considered to avoid
exceeding the maximum junction temperature.
Data on package thermal resistance is provided in Table 3 to
help the designer in this task.
Several equally important aspects must also be considered.
Gate charge of the power MOSFET being driven
Bias voltage value used to power the driver
Maximum switching frequency of operation
Value of external gate resistance
Maximum ambient (and PCB) temperature
Type of package
All of these factors influence and limit the maximum allowable
power dissipated in the driver.
The gate of a power MOSFET has a nonlinear capacitance
characteristic. For this reason, although the input capacitance
is usually reported in the MOSFET data sheet as CISS, it is not
useful to calculate power losses.
The total gate charge necessary to turn on a power MOSFET
device is usually reported on the device data sheet under QG.
This parameter varies from a few nanocoulombs (nC) to several
hundreds of nC and is specified at a specific VGS value (10 V
or 4.5 V).
The power necessary to charge and then discharge the gate of a
power MOSFET can be calculated as follows:
PGATE = VGS × QG × fSW
where:
VGS is the bias voltage powering the driver (VDD).
QG is the total gate charge.
fSW is the maximum switching frequency.
The power dissipated for each gate (PGATE) must be multiplied
by the number of drivers (in this case, 1 or 2) being used in each
package; this PGATE value represents the total power dissipated in
charging and discharging the gates of the power MOSFETs.
Not all of this power is dissipated in the gate driver because
part of it is actually dissipated in the external gate resistor, RG.
The larger the external gate resistor, the smaller the amount of
power that is dissipated in the gate driver.
In modern switching power applications, the value of the gate
resistor is kept at a minimum to increase switching speed and
to minimize switching losses.
In all practical applications where the external resistor is in the
order of a few ohms, the contribution of the external resistor
can be ignored, and the extra loss is assumed to be in the driver,
providing a good guard band for the power loss calculations.
In addition to the gate charge losses, there are also dc bias losses
(PDC) due to the bias current of the driver. This current is present
regardless of the switching frequency.
PDC = VDD × IDD
The total estimated loss is the sum of PDC and PGATE.
PLOSS = PDC + (n × PGATE)
where n is the number of gates driven.
When the total power loss is calculated, the temperature
increase can be calculated as follows:
ΔTJ = PLOSS × θJA
Design Example
For example, consider driving two IRFS4310Z MOSFETs with a
VDD of 12 V at a switching frequency of 100 kHz, using an
ADP3630 in the MSOP package.
The maximum PCB temperature considered for this design is 85°C.
From the MOSFET data sheet, the total gate charge is QG = 120 nC.
PGATE = 12 V × 120 nC × 100 kHz = 144 mW
PDC = 12 V × 1.2 mA = 14.4 mW
PLOSS = 14.4 mW + (2 × 144 mW) = 302.4 mW
The MSOP thermal resistance is 162.2°C/W (see Table 3).
ΔTJ = 302.4 mW × 162.2°C/W = 49.0°C
TJ = TA + ΔTJ = 134.0°C ≤ TJ_MAX
This estimated junction temperature does not factor in the
power dissipated in the external gate resistor and, therefore,
provides a certain guard band.
If a lower junction temperature is required by the design,
the SOIC_N package, which provides a thermal resistance
of 110.6°C/W, can be used. Using the SOIC_N package, the
maximum junction temperature is
ΔTJ = 302.4 mW × 110.6°C/W = 33.4°C
TJ = TA + ΔTJ = 118.4°C ≤ TJ_MAX
Other options to reduce power dissipation in the driver include
reducing the value of the VDD bias voltage, reducing the switching
frequency, and choosing a power MOSFET with a smaller gate
charge.
相关PDF资料 |
PDF描述 |
|---|---|
| ADP3630ARMZ-R7 | High Speed, Dual, 2 A MOSFET Driver, non-inverting A/B input pins; Package: 8 ld MSOP; No of Pins: 8; Temperature Range: Ind |
| ADP3630ARZ-R7 | High Speed, Dual, 2 A MOSFET Driver, non-inverting A/B input pins; Package: 8 ld SOIC; No of Pins: 8; Temperature Range: Ind |
| ADP3631ARMZ-R7 | High Speed, Dual, 2 A MOSFET Driver, inverting A & non-inverting B input pins; Package: 8 ld MSOP; No of Pins: 8; Temperature Range: Ind |
| ADP3631ARZ-R7 | High Speed, Dual, 2 A MOSFET Driver, inverting A & non-inverting B input pins; Package: 8 ld SOIC; No of Pins: 8; Temperature Range: Ind |
| ADP3820ART-4.2-RL | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP3630 | 制造商:AD 制造商全称:Analog Devices 功能描述:High Speed, Dual, 2 A MOSFET Driver |
| ADP3630ARMZ-R7 | 功能描述:IC MOSFET DVR 2A DL HS 8MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:95 系列:- 配置:高端和低端，独立 输入类型:非反相 延迟时间:160ns 电流 - 峰:290mA 配置数:1 输出数:2 高端电压 - 最大（自引导启动）:600V 电源电压:10 V ~ 20 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:管件 产品目录页面:1381 (CN2011-ZH PDF) |
| ADP3630ARZ-R7 | 功能描述:IC MOSFET DVR 2A DL HS 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:95 系列:- 配置:半桥 输入类型:PWM 延迟时间:25ns 电流 - 峰:1.6A 配置数:1 输出数:2 高端电压 - 最大（自引导启动）:118V 电源电压:9 V ~ 14 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:管件 产品目录页面:1282 (CN2011-ZH PDF) 其它名称:*LM5104M*LM5104M/NOPBLM5104M |
| ADP3630ARZ-R7 | 制造商:Analog Devices 功能描述:Dual Non-Inverting MOSFET Driver IC |
| ADP3631 | 制造商:AD 制造商全称:Analog Devices 功能描述:High Speed, Dual, 2 A MOSFET Driver |
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