参数资料
型号: ADP667ARZ-REEL7
厂商: Analog Devices Inc
文件页数: 7/12页
文件大小: 0K
描述: IC REG LDO 5V/ADJ .25A 8SOIC
标准包装: 1
稳压器拓扑结构: 正,固定式或可调式
输出电压: 5V,1.3 V ~ 16 V
输入电压: 3.5 V ~ 16.5 V
电压 - 压降(标准): 0.15V @ 200mA
稳压器数量: 1
电流 - 输出: 250mA(最小值)
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
其它名称: ADP667ARZ-REEL7DKR

ADP667
POWER DISSIPATION
The ADP667 can supply currents up to 250 mA and can oper-
ate with input voltages as high as 16.5 V, but not simultaneously.
It is important that the power dissipation and hence the internal
die temperature be maintained below the maximum limits. Power
Dissipation is the product of the voltage differential across the
regulator times the current being supplied to the load. The
conditions is 700 mW which exceeds the maximum ratings. By
using a dropper resistor to drop 4 V, the power dissipation
requirement for the regulator is reduced to 300 mW which is
within the maximum specifications for the N-8 package at 85 ° C.
The resistor value is calculated as R = 4/0.1 = 40 ? . A resistor
power rating of 400 mW or greater may be used.
maximum package power dissipation is given in the Absolute
Maximum Ratings. In order to avoid excessive die temperatures,
these ratings must be strictly observed.
V IN
12V
40 ?
0.5W
C1
1μF
+
IN
ADP667
OUT
+ C2
10μF
+5V
OUTPUT
P D = (V IN – V OUT ) (I L )
The die temperature is dependent on both the ambient tempera-
ture and on the power being dissipated by the device. The inter-
nal die temperature must not exceed 125 ° C. Therefore, care
must be taken to ensure that, under normal operating condi-
tions, the die temperature is kept below the thermal limit.
T J = T A + P D ( θ JA )
This may be expressed in terms of power dissipation as follows:
P D = ( T J – T A )/( θ JA )
where:
T J = Die Junction Temperature ( ° C)
T A = Ambient Temperature ( ° C)
P D = Power Dissipation (W)
θ JA = Junction to Ambient Thermal Resistance ( ° C/W)
If the device is being operated at the maximum permitted ambi-
ent temperature of 85 ° C, the maximum power dissipation per-
mitted is:
P D (max) = ( T J ( max ) – T A )/( θ JA )
P D ( max ) = (125 – 85)/( θ JA )
= 40/ θ JA
where:
θ JA = 120 ° C/W for the 8-pin DIP (N-8) package
θ JA = 170 ° C/W for the 8-pin SOIC (SO-8) package
Therefore, for a maximum ambient temperature of 85 ° C:
P D (max) = 333 mW for N- 8
P D (max) = 235 mW for SO- 8
SET GND SHDN
Figure 14. Reducing Regulator Power Dissipation
Transient Response
The ADP667 exhibits excellent transient performance as illus-
trated in the “Typical Performance Characteristics.” Figure 12
shows that an input step from 10 V to 6 V results in a very small
output disturbance (50 mV). Adding an input capacitor would
improve this even more.
Figure 13 shows how quickly the regulator recovers from an
output load change from 10 mA to 100 mA. The offset due to
the load current change is less than 1 mV.
Monitored μ P Power Supply
Figure 15 shows the ADP667 being used in a monitored μ P
supply application. The ADP667 supplies +5 V for the micro-
processor. Monitoring the supply, the ADM705 will generate a
reset if the supply voltage falls below 4.65 V. Early warning of
an impending power fail is generated by a power fail comparator
on the ADM705. A resistive divider network samples the pre-
regulator input voltage so that failing power is detected while
the regulator is still operating normally. An interrupt is gener-
ated so that a power-down sequence can be completed before
power is completely lost. The low dropout voltage on the
ADP667 maximizes the available time to carry out the power-
down sequence. The resistor divider network R1 and R2 should
be selected so that the voltage on PFI is 1.25 V at the desired
warning voltage.
UNREGULATED
At lower ambient temperatures the maximum permitted power
dissipation increases accordingly up to the maximum limits
DC
IN
ADP667
specified in the absolute maximum specifications.
The thermal impedance ( θ JA ) figures given are measured in still
OUT
+5V
+
10μF
air conditions and are reduced considerably where fan assisted
cooling is employed. Other techniques for reducing the thermal
impedance include large contact pads on the printed circuit
GND
SET SHDN
board and wide traces. The copper will act as a heat exchanger
thereby reducing the effective thermal impedance.
V CC
RESET
V CC
RESET
High Power Dissipation Recommendations
Where excessive power dissipation due to high input-output
differential voltages and/or high current conditions exists, the
simplest method of reducing the power requirements on the
regulator is to use a series dropper resistor. In this way the
R1
R2
PFI
ADM705
GND
PFO
μP
INTERRUPT
excess power can be dissipated in the external resistor. As an
example, consider an input voltage of +12 V and an output
voltage requirement of +5 V @ 100 mA with an ambient tem-
perature of +85 ° C. The package power dissipation under these
REV. A 0
–7 –
Figure 15. μ P Regulator with Supply Monitoring and Early
Power-Fail Warning
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