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参数资料
| 型号： | ADS1232REF |
| 厂商： | Texas Instruments |
| 文件页数： | 16/39页 |
| 文件大小： | 0K |
| 描述： | EVALUATION MODULE FOR ADS1232 |
| 产品培训模块： | Data Converter Basics |
| 视频文件： | Nuts and Bolts of the Delta-Sigma Converter |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 80 |
| 数据接口： | 串行 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 7.1mW @ 5V |
| 工作温度： | -40°C ~ 105°C |
| 已用 IC / 零件： | ADS1232 |
| 已供物品： | 板 |
| 产品目录页面： | 889 (CN2011-ZH PDF) |
| 相关产品： | ADS1232IPWRG4-ND - IC ADC 24-BIT 10/80SPS 24-TSSOP 296-25894-2-ND - IC ADC 24-BIT 10/80SPS 24-TSSOP ADS1232IPWG4-ND - IC ADC 24-BIT 10/80SPS 24-TSSOP 296-18589-5-ND - IC ADC 24-BIT 10/80SPS 24-TSSOP |
| 其它名称： | 296-20803 |
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www.ti.com
POWER-UP SEQUENCE
AVDD
DVDD
PDWN
m
10 s
POWER-DOWN MODE
DVDD
(1)
Connectto
ADS1232/34
pin
PDWN
1kW
2.2nF
NOTE:(1)AVDDmustbepoweredupatleast
10 sbefore
goeshigh.
m
PDWN
DataReady
Start
Conversion
DRDY/DOUT
SCLK
CLKSoure
Wakeup
Power-DownMode
PDWN
t
13
t
11
t
14
SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008
When powering up the ADS1232/34, AVDD and
DVDD must be powered up before the PDWN pin
goes high, as shown in Figure 39. If PDWN is not
controlled by a microprocessor, a simple RC delay
circuit must be implemented, as shown in Figure 40.
Figure 39. Power-Up Timing Sequence
Power-Down mode shuts down the entire ADC
circuitry and reduces the total power consumption
close to zero. To enter Power-Down mode, simply
hold the PDWN pin low. Power-Down mode also
resets the entire circuitry to free the ADC circuitry
from locking up to an unknown state. Power-Down
mode can be initiated at any time during readback; it
is not necessary to retrieve all 24 bits of data
beforehand. Figure 41 shows the wake-up timing
from Power-Down mode.
Figure 40. RC Delay Circuit
Figure 41. Wake-Up Timing from Power-Down Mode
SYMBOL
DESCRIPTION
TYP
UNITS
Internal clock
7.95
s
t13
Wake-up time after Power-Down mode
External clock
0.16
s
Crystal oscillator(1)
5.6
ms
t14
(2)
PDWN pulse width
26 (min)
s
(1)
No capacitors on CLKIN/XTAL1 or XTAL2 outputs.
(2)
Value given for fCLK = 4.9152MHz. For different fCLK frequencies, the scale is proportional to the CLK period except for a ±3% variation
when an internal oscillator is used.
Copyright 2005–2008, Texas Instruments Incorporated
23
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| ADS1234IPWR | 功能描述:模数转换器 - ADC 24-Bit Ultra Low-Noise RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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