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参数资料
| 型号： | ADS1259EVM-PDK |
| 厂商： | Texas Instruments |
| 文件页数： | 18/48页 |
| 文件大小： | 0K |
| 描述： | KIT PERFORMANCE DEMO FOR ADS1259 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 14k |
| 数据接口： | 串行，SPI? |
| 工作温度： | -40°C ~ 125°C |
| 已用 IC / 零件： | ADS1259 |
| 已供物品： | 2 个板，文档，软件 |
| 其它名称： | 296-30635 ADS1259EVM-PDK-ND |
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OffsetDrift=
V
-
OFFMAX
OFFMIN
TempRange
GainDrift=
GainError
Gain
-
MAX
MIN
Error
TempRange
DRDY
V
=AINP -
IN
AINN
DOUT
OldV
Data
IN
Settled
Data
FullySettled
NewV
Data
IN
Mixof
OldandNew
V
Data
IN
OldVIN
NewV
IN
t
SET
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
Settling Time While Continuously Converting
OFFSET AND GAIN
If there is a step change on the input signal while
The ADS1259 features low offset (40
μV, typ) and low
continuously converting, the next data represent a
gain errors (0.05%, typ). The offset and gain errors
combination of the previous and current input signal
can be corrected by sending calibration commands to
and should therefore be discarded; see Figure 54 for
the ADS1259; see the Calibration section.
this step change. Table 10 shows the number of
The ADS1259 also features very low offset drift
conversion cycles for completely settled data while
(0.05
μV/°C, typ) and very low gain drift (0.5ppm/°C,
continuously converting.
typ). The offset and gain drift are calculated using the
box method, as described by Equation 6 and
Table 10. Settling Time While Continuously
Converting DRDY Periods(1)
SETTLING TIME (tSET) (Conversions)
DATA RATE
(SPS)
sinc1
sinc2
(6)
10
2
3
16.6
2
3
50
2
3
60
2
3
where:
400
2
3
VOFFMAX, VOFFMIN, GainErrorMAX, and GainErrorMIN
1200
2
3
are the maximum and minimum offset and gain
error readings recorded over the Temp Range
3600
3
4
(
–40°C to +105°C)
(7)
14,400
6
7
(1) Settling time is defined as the number of DRDY periods after
the input signal has settled following an input step change.
For best data throughput in multiplexed applications, issue a
START condition (START pin or Start command) after the
input has settled following a multiplexer change; see the
Setling Time Using START section.
Figure 54. Step Change on VIN while Continuously Converting
Copyright
2009–2011, Texas Instruments Incorporated
25
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS1259EVM-PDK | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
| ADS1259IPW | 功能描述:模数转换器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1259IPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
| ADS1259IPWR | 功能描述:模数转换器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS1259QPWRQ1 | 功能描述:24 Bit Analog to Digital Converter 1 Input 1 Sigma-Delta 20-TSSOP 制造商:texas instruments 系列:- 包装:剪切带（CT） 零件状态:有效 位数:24 采样率（每秒）:14k 输入数:1 输入类型:差分，单端 数据接口:SPI 配置:ADC 无线电 - S/H:ADC:- A/D 转换器数:1 架构:三角积分 参考类型:外部 电压 - 电源，模拟:5V 电压 - 电源，数字:2.7 V ~ 5.25 V 特性:PGA 工作温度:-40°C ~ 105°C 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商器件封装:20-TSSOP 标准包装:1 |
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