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| 型号： | ADS7812PG4 |
| 厂商： | Texas Instruments |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | IC 12BIT 35MW SER OUT ADC 16DIP |
| 产品培训模块： | Data Converter Basics |
| 标准包装： | 25 |
| 位数： | 12 |
| 采样率（每秒）： | 40k |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 35mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
| 输入数目和类型： | 3 个单端，单极；3 个单端，双极 |
ADS7812
12
SBAS042A
www.ti.com
External DATACLK Active After the Conversion
and During the Next Conversion
Figure 8 shows a method that is a hybrid of the two previous
approaches. This method works very well for microcontrollers
that do serial transfers 8 bits at a time and for slower
microcontrollers. For example, if the fastest serial clock that
the microcontroller can produce is 1
s, and two 8-bit trans-
fers must be used to obtain the serial data, the approach
shown in Figure 6 would result in a diminished throughput
(26kHz maximum conversion rate). The method described
in Figure 7 could not be used because time t25 would be
violated. The approach in Figure 8 results in an improved
throughput rate (33kHz maximum with a 1
s clock) and
DATACLK is LOW during t25.
COMPATIBILITY WITH THE ADS7813
The only difference between the ADS7812 and the ADS7813
is in the internal control logic and the digital interface. Since
the ADS7813 is a 16-bit converter, the internal shift register
is 16 bits wide. In addition, only 16-bit decisions are made
during the conversion. Thus, the ADS7813’s conversion
time is approximately 133% of the ADS7812’s.
The timing presented in this data sheet will allow as much
compatibility as possible with the ADS7813. The main
concern will be the different number of serial clocks. If a
design must be compatible with both the ADS7812 and
ADS7813, it is recommended to consider the ADS7813
first. If the design works with the ADS7813, it will certainly
work with the ADS7812. This is also true in regards to
layout (see the Layout section of this data sheet).
CHIP SELECT (CS)
The CS input allows the digital outputs of the ADS7812 to
be disabled and gates the external DATACLK signal when
EXT/INT is HIGH. See Figure 9 for the enable and disable
time associated with CS and Figure 3 for a block diagram of
the ADS7812’s logic. The digital outputs can be disabled at
any time.
Note that a conversion is initiated on the falling edge of CONV
even if CS is HIGH. If the EXT/INT input is LOW (internal
DATACLK) and CS is HIGH during the entire conversion, the
previous conversion result will be lost (the serial transmission
occurs but DATA and DATACLK are disabled).
TABLE IV. Complete List of Ideal Input Ranges.
ANALOG
CONNECT
INPUT
R1IN
R2IN
R3IN
IMPEDANCE
RANGE (V)
TO
(k
)
COMMENT
0.3125 to 2.8125
VIN
> 10,000
Specified offset and gain
–0.417 to 2.916
VIN
BUF
26.7
VIN cannot go below GND – 0.3V
0.417 to 3.750
VIN
GND
26.7
Offset and gain not specified
±3.333
VIN
BUF
VIN
21.3
Specified offset and gain
–15 to 5
VIN
BUF
45.7
Offset and gain not specified
±10
VIN
BUF
GND
45.7
Specified offset and gain
0.833 to 7.5
VIN
GND
VIN
21.3
Offset and gain not specified
–2.5 to 17.5
VIN
GND
BUF
45.7
Exceeds absolute maximum VIN
2.5 to 22.5
VIN
GND
45.7
Exceeds absolute maximum VIN
0 to 2.857
BUF
VIN
45.7
Offset and gain not specified
–1 to 3
BUF
VIN
BUF
21.3
VIN cannot go below GND – 0.3V
0 to 4
BUF
VIN
GND
21.3
Specified offset and gain
–6.25 to 3.75
BUF
VIN
26.7
Offset and gain not specified
0 to 10
BUF
GND
VIN
26.7
Specified offset and gain
0.357 to 3.214
GND
VIN
45.7
Offset and gain not specified
–0.5 to 3.5
GND
VIN
BUF
21.3
VIN cannot go below GND – 0.3V
0.5 to 4.5
GND
VIN
GND
21.3
Specified offset and gain
±5
GND
BUF
VIN
26.7
Specified offset and gain
1.25 to 11.25
GND
VIN
26.7
Offset and gain not specified
ANALOG INPUT
The ADS7812 offers a number of input ranges. This is
accomplished by connecting the three input resistors to
either the analog input (VIN), to ground (GND), or to the
2.5V reference buffer output (BUF). Table I shows the
input ranges that are typically used in data acquisition
applications. These ranges are all specified to meet the
specifications given in the Specifications table. Table IV
contains a complete list of ideal input ranges, associated
input connections, and comments regarding the range.
Active
HI-Z
BUSY, DATA,
DATACLK(1)
CS
t
27
t
26
NOTE: (1) DATACLK is an output only when EXT/INT is LOW.
FIGURE 9. Enable and Disable Timing for Digital Outputs.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS7812U | 功能描述:模数转换器 - ADC Low-Power Serial 12-Bit Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS7812U | 制造商:Texas Instruments 功能描述:A/D Converter (A-D) IC 制造商:Texas Instruments 功能描述:IC, ADC, 12BIT, 40KSPS, SOIC-16 |
| ADS7812U/1K | 功能描述:模数转换器 - ADC Low-Pwr Serial 12B Sampling ADC Cnvrtr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS7812U/1KE4 | 功能描述:模数转换器 - ADC Low-Power Serial 12-Bit Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS7812U/1KG4 | 功能描述:模数转换器 - ADC Low-Pwr Serial 12B Sampling ADC Cnvrtr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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