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参数资料
| 型号： | ADSP-21366YSWZ-2AA |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/60页 |
| 文件大小： | 0K |
| 描述： | IC DSP 32BIT 200MHZ EPAD 144LQFP |
| 产品培训模块： | SHARC Processor Overview |
| 标准包装： | 1 |
| 系列： | SHARC® |
| 类型： | 浮点 |
| 接口： | DAI，SPI |
| 时钟速率： | 200MHz |
| 非易失内存： | ROM（512 kB） |
| 芯片上RAM： | 384kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 1.00V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP 裸露焊盘 |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
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SHARC Processors
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
SUMMARY
High performance 32-bit/40-bit floating point processor
optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational
architecture
On-chip memory—3M bits of on-chip SRAM
Code compatible with all other members of the SHARC family
The ADSP-2136x processors are available with up to 333 MHz
core instruction rate with unique audiocentric peripherals
such as the digital applications interface, S/PDIF trans-
ceiver, DTCP (digital transmission content protection
protocol), serial ports, precision clock generators, and
DEDICATED AUDIO COMPONENTS
S/PDIF-compatible digital audio receiver/transmitter
8 channels of asynchronous sample rate converters (SRC)
16 PWM outputs configured as four groups of four outputs
ROM-based security features include:
JTAG access to memory permitted with a 64-bit key
Protected memory regions that can be assigned to limit
access under program control to sensitive code
PLL has a wide variety of software and hardware multi-
plier/divider ratios
Available in 136-ball CSP_BGA and 144-lead LQFP_EP
packages
more. For complete ordering information, see Ordering
Internal Memory
SIMD Core
Block 0
RAM/ROM
Block 1
RAM/ROM
Block 2
RAM
Block 3
RAM
Instruction
Cache
5 stage
Sequencer
DAG1/2
Timer
S
B0D
64-BIT
B1D
64-BIT
B2D
64-BIT
B3D
64-BIT
DMD 64-BIT
DMD 64-BIT
PEx
FLAGx/IRQx/
TMREXP
PEy
JTAG
Core Bus
Cross Bar
PMD 64-BIT
PERIPHERAL BUS
PMD 64-BIT
Internal Memory I/F
IOD 32-BIT
32-BIT
MTM/
DTCP
PERIPHERAL BUS
IOD BUS
CORE TIMER
FLAGS 2-0
ASRC
3-0
S/PDIF
Tx/Rx
PCG
A-B
SPI B
PDAP/ SPORT
IDP7-0 5-0
SPI
Core
Flags
PWM
3-0
PP
DAI Routing/Pins
DAI Peripherals
Figure 1. Functional Block Diagram
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
PP Pin MUX
Peripherals
Rev. J
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700 ?2013 Analog Devices, Inc. All rights reserved.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-21367 | 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processors |
| ADSP-21367_06 | 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processors |
| ADSP-21367_08 | 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processors |
| ADSP-21367BBP-2A | 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT/40-BIT 333MHZ 333MIPS 256SBGA - Trays |
| ADSP-21367BBPZ-2A | 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT/40-BIT 333MHZ 333MIPS 256SBGA - Trays |
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