参数资料
型号: ADSP-BF531SBBZ400
厂商: Analog Devices Inc
文件页数: 35/64页
文件大小: 0K
描述: IC DSP CTLR 16BIT 400MHZ 169BGA
产品培训模块: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: SPI,SSP,UART
时钟速率: 400MHz
非易失内存: ROM(1 kB)
芯片上RAM: 52kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 169-BBGA
供应商设备封装: 169-PBGA(19x19)
包装: 托盘
配用: ADZS-BF533-EZLITE-ND - KIT W/BOARD EVAL FOR ADSP-BF533
ADSP-BF531 / ADSP-BF532 / ADSP-BF533
DATA RECEIVE—INTERNAL CLOCK
DATA RECEIVE—EXTERNAL CLOCK
DRIVE EDGE
t SCLKIW
SAMPLE EDGE
DRIVE EDGE
t SCLKEW
SAMPLE EDGE
t SCLKE
RSCLKx
RFSx
(OUTPUT)
t HOFSI
t DFSI
RSCLKx
t HOFSE
RFSx
(OUTPUT)
t DFSE
t SFSI
RFSx
(INPUT)
t SDRI
DRx
DATA TRANSMIT—INTERNAL CLOCK
t HFSI
t HDRI
t SFSE
RFSx
(INPUT)
t SDRE
DRx
DATA TRANSMIT—EXTERNAL CLOCK
t HFSE
t HDRE
DRIVE EDGE
t SCLKIW
SAMPLE EDGE
DRIVE EDGE
t SCLKEW
SAMPLE EDGE
t SCLKE
TSCLKx
TFSx
(OUTPUT)
t HOFSI
t D FSI
TSCLKx
t HOFSE
TFSx
(OUTPUT)
t DFSE
TFSx
(INPUT)
DTx
t HDTI
t DDTI
t SFSI
t HFSI
TFSx
(INPUT)
DTx
t HDTE
t DDTE
t SFSE
t HFSE
Figure 23. Serial Ports
TSCLKx
(INPUT)
t SUDTE
TFSx
(INPUT)
RSCLKx
(INPUT)
t SUDRE
RFSx
(INPUT)
FIRST
TSCLKx/RSCLKx
EDGE AFTER
SPORT ENABLED
Figure 24. Serial Port Start Up with External Clock and Frame Sync
Rev. I
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Page 35 of 64 |
August 2013
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