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| 型号： | ADT7476ARQZ-R7 |
| 厂商： | ON Semiconductor |
| 文件页数： | 49/65页 |
| 文件大小： | 0K |
| 描述： | IC REMOTE THERMAL CTLR 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 1,000 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±2.5% |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 带卷 (TR) |
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ADT7476
Table 50. REGISTER 0X10 ? CONFIGURATION REGISTER 6 (POWER-ON DEFAULT = 0X00) (Note 1 and 2)
Bit No.
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Mnemonic
SlowFan
Remote 1
SlowFan
Local
SlowFan
Remote 2
THERM in
Manual
SlaveEn
MasterEn
V CCP Low
ExtraSlow
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When this bit is set, Fan 1 smoothing times are multiplied x4 for Remote 1 temperature
channel (as defined in Register 0x62).
When this bit is set, Fan 2 smoothing times are multiplied x4 for local temperature channel
(as defined in Register 0x63).
When this bit is set, Fan 3 smoothing times are multiplied x4 for Remote 2 temperature
channel (as defined in Register 0x63).
When this bit is set, THERM is enabled in manual mode. (Note 1)
Setting this bit configures the ADT7476 as a slave for use in fan sync mode.
Setting this bit configures the ADT7476 as a master for use in fan sync mode.
V CCP Low = 1. When the power is supplied from 3.3 V STANDBY and the core voltage (V CCP )
drops below its V CCP low limit value (Register 0x46), the following occurs:
Status Bit 1 in Interrupt Status Register 1 is set.
SMBALER T is generated, if enabled.
PROCHOT monitoring is disabled.
Everything is re-enabled once V CCP increases above the V CCP low limit.When V CCP increases
above the low limit:
PROCHOT monitoring is enabled.
Fans return to their programmed state after a spin-up cycle.
When this bit is set, all fan smoothing times are increased by a further 39.2%
1. A THERM event always overrides any fan setting (even when fans are disabled).
2. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to this register fail.
Table 51. REGISTER 0X11 ? CONFIGURATION REGISTER 7 (POWER-ON DEFAULT = 0X00) (Note 1)
Bit No.
[0]
[7:1]
Mnemonic
DisTHERM
Hys
Reserved
R/W
Read/Write
N/A
Description
Setting this bit to 1 disables THERM hysteresis.
Reserved. Do not write to these bits.
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to this register fail.
Table 52. VOLTAGE READING REGISTERS (POWER-ON DEFAULT = 0X00) (Note 1)
Register Address
0x20
0x21
0x22
0x23
0x24
R/W
Read-only
Read-only
Read-only
Read-only
Read-only
Description
Reflects the voltage measurement at the 2.5 V input on Pin 22 (8 MSBs of reading).
Reflects the voltage measurement (Note 2) at the V CCP input on Pin 23 (8 MSBs of reading).
Reflects the voltage measurement (Note 3) at the V CC input on Pin 4 (8 MSBs of reading).
Reflects the voltage measurement at the 5.0 V input on Pin 20 (8 MSBs of reading).
Reflects the voltage measurement at the 12 V input on Pin 21 (8 MSBs of reading).
1. If the extended resolution bits of these readings are also being read, the extended resolution registers (Register 0x76, Register 0x77) must
be read first. Once the extended resolution registers have been read, the associated MSB reading registers are frozen until read. Both the
extended resolution registers and the MSB registers are frozen.
2. If V CCP Low (Bit 7 of 0x40) is set, V CCP can control the sleep state of the ADT7476.
3. V CC (Pin 4) is the supply voltage for the ADT7476.
Table 53. TEMPERATURE READING REGISTERS (POWER-ON DEFAULT = 0X80) (Note 1. 2 and 3)
Register Address
0x25
0x26
0x27
R/W
Read-only
Read-only
Read-only
Description
Remote 1 temperature reading (Note 3 and 4) (8 MSBs of reading).
Local temperature reading (8 MSBs of reading).
Remote 2 temperature reading (Note 3 and 4) (8 MSBs of reading).
1. If the extended resolution bits of these readings are also being read, the extended resolution registers (Register 0x76, Register 0x77) must
be read first. Once the extended resolution registers have been read, all associated MSB reading registers are frozen until read. Both the
extended resolution registers and the MSB registers are frozen.
2. These temperature readings can be in twos complement or Offset 64 format; this interpretation is determined by Bit 0 of Configuration
Register 5 (0x7C).
3. In twos complement mode, a temperature reading of ? 128 ° C (0x80) indicates a diode fault (open or short) on that channel.
4. In Offset 64 mode, a temperature reading of ? 64 ° C (0x00) indicates a diode fault (open or short) on that channel.
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