参数资料
型号: ADUC7034BCPZ-RL
厂商: Analog Devices Inc
文件页数: 88/136页
文件大小: 0K
描述: IC MCU FLASH 32K ANLG IO 48LFCSP
标准包装: 2,500
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 20.48MHz
连通性: LIN,SPI,UART/USART
外围设备: POR,PSM,温度传感器,WDT
输入/输出数: 9
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 1K x 32
电压 - 电源 (Vcc/Vdd): 3.5 V ~ 18 V
数据转换器: A/D 2x16b
振荡器型: 内部
工作温度: -40°C ~ 115°C
封装/外壳: 48-VFQFN 裸露焊盘,CSP
包装: 带卷 (TR)
ADuC7034
Rev. B | Page 55 of 136
Low Power Voltage Reference Scaling Factor Register
Name:
ADCREF
Address:
0xFFFF057C
Default
Value:
Part specific, factory programmed
Access:
Read/write. Care should be taken not to write to
this register.
Function:
This MMR allows user code to correct for the
initial error of the LPM reference. Value 0x8000
corresponds to no error when compared with the
normal mode reference. The magnitude of the ADC
result should be multiplied by the value in ADCREF
and divided by 0x8000 to compensate for the
actual value of the low power reference. If the LPM
voltage reference is 1% below 1.200 V, the value of
ADCREF is approximately 0x7EB9. If the LPM
voltage reference is 1% above 1.200 V, the value of
ADCREF is approximately 0x8147.
This register corrects the effective value of the LPM reference at
the temperature at which the reference is measured during the
Analog Devices, Inc., production flow, which is 25°C. There is
no change to the temperature coefficient of the LPM reference
when using the ADCREF MMR.
This register should not be used if the precision reference is
being used in low power mode (if ADCMDE[5] is set).
ADC POWER MODES OF OPERATION
The ADCs can be configured into various reduced or full
power modes of operation by changing the configuration of
ADCMDE[4:3], and the ARM7 MCU can be configured in low
power modes of operation (POWCON[5:3]). Note that the core
power modes are independently controlled and are not related
to the ADC power modes.
ADC Normal Power Mode
In normal mode, the current and voltage/temperature channels
are fully enabled. The ADC modulator clock is 512 kHz and
enables the ADCs to provide regular conversion results at a rate
between 4 Hz and 8 kHz (see the ADC Filter Register section).
Both channels are under full control of the MCU and can be
reconfigured at any time. The default ADC update rate for all
channels in this mode is 1.0 kHz.
Note that I-ADC and V-/T-ADC channels can be configured to
initiate periodic single conversion cycles in normal power mode
with high accuracy before returning to ADC full power-down
mode. This flexibility is facilitated by the full MCU control via
the ADCMDE MMR, which ensures the feasibility of continuous
periodic monitoring of battery current, voltage, and temperature
settings while minimizing the average dc current consumption.
In ADC normal mode, the PLL must not be powered down.
ADC Low Power Mode
In ADC low power mode, the I-ADC is enabled in a reduced
power and reduced accuracy configuration. In this mode, the
ADC modulator clock is driven directly from the on-chip
131 kHz low power oscillator, which allows the ADC to be
configured at update rates as low as 1 Hz (ADCFLT). The gain
of the ADC in this mode is fixed at 128.
All ADC peripheral functions (result counter, digital
comparator, and accumulator) described in the ADC Normal
Power Mode section can also be enabled in low power mode.
Typically, in low power mode only the I-ADC is configured to
run at a low update rate and to continuously monitor battery
current. The MCU is in power-down mode and wakes up when
the I-ADC interrupts the MCU. Such an interrupt occurs after the
I-ADC detects a current conversion that exceeds a preprogrammed
threshold, a setpoint, or a set number of conversions.
It is also possible to select either the ADC precision voltage
reference or the ADC low power mode voltage reference via
ADCMDE[5].
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