参数资料
型号: ADUM1420BRWZ-RL
厂商: Analog Devices Inc
文件页数: 10/12页
文件大小: 0K
描述: IC ISOLATOR DGTL 4CH 28SOIC
产品变化通告: ADuM1420 Obsolescence 09/Mar/2012
标准包装: 1,000
系列: iCoupler®
输入 - 1 侧/2 侧: 4/0
通道数: 4
电源电压: 4.5 V ~ 5.5 V
电压 - 隔离: 1667Vrms
数据速率: 10Mbps
传输延迟: 110ns
输出类型: 逻辑
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
工作温度: -40°C ~ 105°C
ADuM1420
POWER-UP/POWER-DOWN CONSIDERATIONS
Given that the ADuM1420 has separate supplies on either side
of the isolation barrier for each channel, the power-up/power-
down characteristics relative to each supply voltage need to be
considered individually.
As shown in Table 7, when V DD1 input power is off, the ADuM1420
outputs take on a default low logic state. As the V DD1 supply is
increased/decreased, the output of each channel transitions
from/to a logic low to/from the state matching its respective
input (see Figure 13 and Figure 14).
OUTPUT
DATA
When V DD1 crosses the threshold for activating the refresh
function (approximately 2.5 V), there can be a delay of up to
2 μs before the output is updated to the correct state, depending
on the timing of the next refresh pulse. When V DD1 is reduced
from an on state to below the 2.0 V threshold, there can be a
delay of up to 5 μs before the output takes on its default low state.
In addition, during power-up/power-down, there is a range of
V DD1 values within which erroneous outputs can occur if the
input data either is a logic high or is in transition between logic
states. This range is between 2.5 V and 2.7 V. The recommended
practice is to set all the input logic levels to low during power-up/
power-down.
V DD1
2.5
(TYP)
Figure 13. V DD1 Power-Up/Power-Down Characteristics, Input Data = High
V DD1
OUTPUT DATA
Figure 14. V DD1 Power-Up/Power-Down Characteristics, Input Data = Low
Rev. A | Page 10 of 12
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