参数资料
型号: ADUM6132ARWZ
厂商: Analog Devices Inc
文件页数: 3/16页
文件大小: 0K
描述: IC GATE DVR ISO HALF BRDG 16SOIC
其它图纸: ADUM6132 Block Diagram
标准包装: 47
系列: isoPower®
输入 - 1 侧/2 侧: 2/0
通道数: 2
电源电压: 4.5 V ~ 5.5 V
电压 - 隔离: 3750Vrms
传输延迟: 60ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
工作温度: -40°C ~ 85°C
产品目录页面: 2766 (CN2011-ZH PDF)

Data Sheet
ADuM6132
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground; 4.5 V ≤ V DD = V DDL ≤ 5.5 V; 12.5 V ≤ V DDB ≤ 17.0 V; V DDA = V ISO . All minimum/maximum
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T A = 25°C,
V DD = V DDL = 5.0 V, V DDB = 15 V, V DDA = V ISO .
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DC SPECIFICATIONS
Isolated Power Supply
Input Current, Quiescent
Input Current, Loaded
Maximum Output Current 1
I DD(Q)
I DD
I ISO(MAX)
22
280
350
mA
mA
mA
I ISO = 0 mA, dc signal inputs
I ISO = I ISO(MAX)
12.5 V ≤ V ISO ≤ 17.0 V
Output Voltage
V ISO
12.5
15
17
V
0 mA ≤ I ISO ≤ 22 mA
Logic Supply
Input Current
I DDL
1.8
3.0
mA
Output Supplies, Channel A or Channel B 2
Supply Current, Quiescent
I DDA(Q) , I DDB(Q)
1.0
2.0
mA
Supply Current, f IN = 20 kHz
Supply Current, f IN = 100 kHz
Supply Current, f IN = 1000 kHz
I DDA(20) , I DDB(20)
I DDA(100) , I DDB(100)
I DDA(1000) , I DDB(1000)
1.1
1.3
4.5
2.1
2.3
5.5
mA
mA
mA
C L = 200 pF
C L = 200 pF
C L = 200 pF
Logic Inputs, Channel A or Channel B
Input Current
I IA , I IB
?10
+0.01
+10
μA
0 V ≤ V IA , V IB ≤ 5.5 V
Logic High Input Voltage
Logic Low Input Voltage
V IAH , V IBH
V IAL , V IBL
0.7 × V DDL
0.3 × V DDL
V
V
Outputs, Channel A or Channel B
Channel A High Level Output Voltage
Channel B High Level Output Voltage
Low Level Output Voltages
High Level Output Current, Peak 3
Low Level Output Current, Peak 3
V OAH
V OBH
V OAL ,V OBL
I OAH , I OBH
I OAL , I OBL
V DDA ? 0.1
V DDB ? 0.1
200
200
0.1
V
V
V
mA
mA
I OAH = ?1 mA
I OBH = ?1 mA
I OAL , I OBL = 1 mA
Undervoltage Lockout, V DDA or V DDB Supply 4
Positive Going Threshold
Negative Going Threshold
Hysteresis
V DDAUV+ , V DDBUV+
V DDAUV? , V DDBUV?
V DDAUVH , V DDBUVH
11.0
10.0
11.7
10.7
1.0
12.3
11.2
V
V
V
Undervoltage Lockout, V DDL Supply 4
Positive Going Threshold
Negative Going Threshold
Hysteresis
V DDLUV+
V DDLUV?
V DDLUVH
3.5
3.1
0.5
4.2
3.8
V
V
V
SWITCHING SPECIFICATIONS
Minimum Pulse Width 1
Maximum Switching Frequency 1
PW
f IN
1000
50
ns
kHz
C L = 200 pF
C L = 200 pF
Propagation Delay 1
t PHL , t PLH
40
60
100
ns
C L = 200 pF
Change vs. Temperature
100
ps/°C
Pulse Width Distortion, |t PLH ? t PHL |
Channel-to-Channel Matching, Rising or
Falling Matching Edge Polarity 1
Channel-to-Channel Matching, Rising vs.
PWD
t M2
t M1
10
20
20
ns
ns
ns
C L = 200 pF
C L = 200 pF
C L = 200 pF
Falling Opposite Edge Polarity 1
Rev. B | Page 3 of 16
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