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参数资料
| 型号： | ADV3003ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC EQUALZR HDMI/DVI TMDS 40LFCSP |
| 标准包装： | 1 |
| 应用： | DVI，HDMI 均衡器/驱动器 |
| 接口： | TMDS |
| 电源电压： | 3 V ~ 3.6 V |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-VQ（6x6） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
ADV3003
Rev. 0 | Page 10 of 16
THEORY OF OPERATION
INTRODUCTION
The primary function of the ADV3003 is to buffer the four high
speed channels of a single HDMI or DVI link. The HDMI/DVI
link consists of four differential, high speed channels and four
auxiliary single-ended, low speed control signals. The high
speed channels include a data-word clock and three transition
minimized differential signaling (TMDS) data channels
running at 10× the data-word clock frequency for data rates
up to 2.25 Gbps.
All four high speed TMDS channels on the ADV3003 are
identical; that is, the pixel clock can be run on any of the four
TMDS channels. Receive channel compensation (12 dB of
fixed equalization) is provided for the high speed channels
to support long input cables. The ADV3003 also includes
selectable pre-emphasis for driving high loss output cables
or long PCB traces.
In the intended application, the ADV3003 is placed between
a source and a sink, with long cable runs at both the input and
the output.
INPUT CHANNELS
Each high speed input differential pair terminates to the
3.3 V VTTI power supply through a pair of single-ended 50 Ω
on-chip resistors, as shown in Figure 25. When the transmitter
of the ADV3003 is disabled by setting the TX_EN control pin
as shown in Table 5, the input termination resistors are also
disabled to provide a high impedance node at the inputs. Disabl-
ing the input terminations when the transmitter is disabled
indicates to any connected HDMI sources that the link through
the ADV3003 is inactive.
CABLE
EQ
50
TX_EN
50
IP[3:0]
IN[3:0]
AVEE
VTTI
07
21
2-
0
25
Figure 25. High Speed Input Simplified Schematic
The input equalizer provides 12 dB of high frequency boost.
No specific cable length is suggested for this equalization level
because cable performance varies widely among manufacturers;
however, in general, the ADV3003 does not degrade input
signals, even for short input cables. The ADV3003 can equalize
more than 20 meters of a 24 AWG cable at 2.25 Gbps, for
reference cables that exhibit an insertion loss of 15 dB at the
fundamental frequency of this data rate.
OUTPUT CHANNELS
Each high speed output differential pair of the ADV3003
terminates to the 3.3 V VTTO power supply through two
single-ended 50 Ω on-chip resistors, as shown in Figure 26.
TX_EN
VTTO
50
OP[3:0]
ON[3:0]
AVEE
IOUT
0
72
12
-0
26
Figure 26. High Speed Output Simplified Schematic
The output termination resistors of the ADV3003 back-terminate
the output TMDS transmission lines. These back-terminations,
as recommended in the HDMI 1.3 specification, act to absorb
reflections from impedance discontinuities on the output traces,
improving the signal integrity of the output traces and adding
flexibility to how the output traces can be routed. For example,
interlayer vias can be used to route the ADV3003 TMDS outputs
on multiple layers of the PCB without severely degrading the
quality of the output signal.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADV3003ACPZ-R7 | 功能描述:IC EQUALZR HDMI/DVI TMDS 40LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| ADV3003-EVALZ | 制造商:Analog Devices 功能描述:EVAL KIT FOR HDMI/DVI PERCENTDS EQUALIZER - Bulk |
| ADV3014KSTZ | 功能描述:IC MUX HDMI FAST SW LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 模拟开关，多路复用器，多路分解器 系列:* 其它有关文件:STG4159 View All Specifications 标准包装:5,000 系列:- 功能:开关 电路:1 x SPDT 导通状态电阻:300 毫欧 电压电源:双电源 电压 - 电源，单路/双路(±):±1.65 V ~ 4.8 V 电流 - 电源:50nA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:7-WFBGA，FCBGA 供应商设备封装:7-覆晶 包装:带卷 (TR) |
| ADV30635210 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV30639709 | 制造商:LG Corporation 功能描述:Frame Assembly, Display |
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